ELF>@@@('GNU/XVxEdb2މUHHG@HGҁ !HWfUHGtWƒDPfDGɃffff.UHGt!OLH@OɃɃff.UHɍOff.UHDf.UHWw ҋfff.UHWu ffff.UHW t w(wD0@GGƒ fDUHSFt YII;tdu^)HLIB\+^B\yvMMtAIIHBHII[fri[I$fDHl$DHl DHl(uf.t;HcHHH)[@fHcHHHR)2UHHHt2yHHiH tu h}t@}fUH1HcHiH Hy(~)p fUHHOBH@p@t?H1fD;~ Hu@tJ%кMÐ12~3N1)ʃкMÐ1@t% fff.UHHH@ DUHHtlucHtcH~8ttH0 u(EtteHHHtVH90uLH1HuLH1LH11LH1ÐUHH@H]LeLmLuL}@HuH]LeLmLuL}@ ttHN8HtHy8u ttLkHHuULHuIH L$Et$HUȅt9AA%A Et$AD$ AD$LL19AEt$DUHH@H]LeLmLuL}AHIIDEDhDEILLHDAOLH߸ADH]LeLmLuL}fff.UHH H]LeLmXD ADA!A)H]LeDLmffff.UHSHHЋVtuBY&>uVHc^H\yw3Q$ttH[HD(MtAHHLJHRL9H(t*v 9rw uD9qvkHL9H(HuH ILHtH[fD>1fHD$jfHD ZfHIH[fDt+HcHHHH[HcHHHbUHAWAVAUATSH8HHHDžHt HHAAI1IHAڍZDA|$uA<$tHcHiHRHM IpM@LLFLBLFLBA<$tIMMD (HIMHAHqIuHLLLMAAI1fAtN؍XDAUtHI$M$HiI $HIMD(AuLMH@LDžDžAHHHt>HH yuHDEEn AANEu A~$҃BDLL1IE1E11AD,-11EEED9H(AAHW8Hw0M\1L9tB1ADAA9DBD_HEu L҃D9AADC҃AAAD!gEADAD[LLtF,(HDD91EHH1H8[A\A]A^A_H w  vE1MEMcHLIiHH LD (H KTmIiHLH LGHwHzH~HRHVE'+EEuADAEgZE'McuLDžBDžGD (DžDžHHiҰ}=G@HHH8LoHH1LHLLD (HH yHH HikD}ALLHHH8LwDHDLH1UHAWAVAUATSHHHGHHIIԈMDEHHEHEIcMHM4$l \MHCxM|$H@ID$@ %=IT$I|$ HUHpHhIAHHCx}H@(HEAIvHLHHuH}Lc}HED8A#HH8LgDHHL1Al ugHHD[A\A]A^A_DMAHIvH@HUIcD:LAqD$fDH}EIcLHD0DxAADDED!U))p H}L8HLHHMHMl HuH}AHH8H_HH1Hf.LHHM!p HM;t HuH}HDp H8H_DHHH1AWfDD$fDHCxH@H@HID$BLH)p f.p l aE1MILHH1AfDMILHH1A^fDMILHH1A&fDMILHH1AfDMILHH1AfDMILHH1A~fDMILHH1AFfDIMLHUHUHH1MLHH1LIt$HAf==MILHH1E1rf.Lq=L@H`HMfM@Mt I|$ l tLH})p HuH}A}HIILDHLDHH8LoMHLLH1HULHAąDI{==MILHH1E1)LH)p ff.UHHPH]LeLmLuL}1H~8HIIFHcLMHIĸM HCHHHEA}HE;IVI4$HI4$HHHI4$HAwt f{Nv;A  AAW t꾱ĉf{N QA HuH}I4$1Hf{NwTE1LLH.Iv1H߉ELHEH]LeLmLuL}fE11LLHA}_QA LLLHLHHuH}pHH8H_HH1HCfUHHPH]LeLmLuL}HAI1HLMqIt$H8'LHIt$H@It$HIHCHHHEHEHCxHH@(HEID$AHpAHHuH}HA$`HAH8LoMMHHL1It$HfDH]LeLmLuL}LHHuH}$IIAHHH1끐HEAH8H_DHHH1HIIAHHH1fDHCP0@4It$HIt$HIt$H@ AD$$AGACHHEH8H_DHHH1jHILDHH8LgLHHL1HU1HAƅDIUHH0H]LeLmLuL}HILcHLIHCx1Ҿ HLp(HLLHzBl uCLHAH]LeLmLuL}Lp ;t HLHDp H8LwDHHL1LA HItLLL1]fDLL1EfDHƉp LHHH8LwHH1L_HH8H_HH1H1HILDHH8LgLHHL1L1H}fDUHAWAVAUATSH11IAIIHIc$E1HHEI@IcAg@AHiHUIH|pAuA$LkHLIHC@t 0 t/A$HLLH[A\A]A^A_DA$ HuHLLH[A\A]A^A_D H[A\A]A^A_1LLA$;fffff.UHH`H]LeLmLuL}E111III~9E$MDMMtMM9t9LLu!1ۉLeH]LmLuL}ڐIvLDELU@ t1LHHEtMgHLHEIGxHUH@HB@ DELU%=LmIpIhLUDEI LDELDLUt%LHuLHuLLLUHuLHEHxLUHEDhA tAtAtDLLULUAl +AEA]LUHiI|(tDLLDmHiII9t'IMIHMMD(LHiAIAtIIcHiIHB0@eHr0LHEHUHUHB0HE`81LL]IvULbIGxH@H@HHBLLULU11IHH0uA)p HLLULUIH8H_DHHH1HILDIH8H_LHHH1LHUHHH9B tLHLWfUHAUATSHIHvI@LIuIuL@H@@uH[A\A]UHH@H]LeLmLuL}11IAHIH]LeLmLuL}fLA0 uIc$LMIvHË@Cu0tIvLINjIvLPE111LLQAIvLEAEt3ʍJD3tsuLLEȉMMELLE ELAfDH Ht7HtDLLEH EHHǃ AHAupffffff.UHAWAVAUATSHHHuHcILAMIEHHHEHUHEIHE11Wy@AAEEMiFD@A sAEuFɃ A9v@HcI DIAty@DAAAGDP@LO믅0I$@@ЃDBE1HiID0H@8]DLeD}HE}DD`AEHMDLEMiH1H}DHcILJ@ H}IVH7LHEHEKT>(LH9]v@HUHcH@sD`AAFd`e@fHEȋ]LIVLeD}H0A؉HuH}HUHu1AL8H}1D}HEMLeF@D`AEELMiO$&It$0Ml$0ID$0Ae9]v.HUHcH@tD`AAFd`fDHuH}1HH[A\A]A^A_IEH8H_MMHHH1HuH}IEH8H_MMHHH1IEH8H_HH1H@UHH@H]LeLmLuL}IAIIH?H]LeLmLuL}DM$A$0 uCKLHA1AAVvIcLIHPHUH@HHECISHuLCAKɃD AE#wALEwHuEDDAсD9v D IcHLI1KfSƒTP4f.KLH?I$H8LgIHHLH11:DUHAWAVAUATSHxHHuHADMuHx[A\A]A^A_LDɺDxLHEH}DxtIGHADEHHEEHEXL3HUMDu)fDHuLHuH}SID]DmE1IEI1AVҋMHiIB@HB(HP@H9P@QIEuHP0J9JCMM@HɃ1 AD9eIcAM,MuMEI?LIALLpLxLpLxIF0HxKAFAVƒTPfDHLH'fDm]LӃ}HUEHcMtD1 R҉҃HiAL@A9v HcHBtRʃTQHuH}EEHAGD H;EsEEEE1DmIfDDhAEEMȋUMiuLHKD,0AD9uIcH@tDhAAFlh륐H]DmHEDELIT$H0DHUHuE11L(=H}EItW1.@HiIL0AA9ՉAv%HcH@t@ȃDADHuLH}LEDDmE1z@LAHiIHp0HH0HxHpHhHxLLH@0HhaHpHE9v=IcHH@y@ȃDAlENf.HuLf.DmE1H]LuDDmiDhAEI6DLDEIT$I6LHxMiHxLKT,0H9]HUHcH@tDhAAFlhHHHEEWIEfH8H_DHHH1IH8H_HH1H]IEfH8H_DHHH1-IEfH8H_DHHH1IEfH8H_DHHH1IH8H_HH1HfUHHPH]LeLmLuL}IADL}HHiHcMHDLp`L@`ANl E$DHI JDHPHpJDDHHpHuH}IHtbHcUAMHH ¸IVJLAHQHqFH]LeLmLuL}ANA$MDHHH8LgHH1LHLmLeH8H_MHLHH1uff.UHH@H]LeLmLuL}Lf LMFDvAAFtrIc$DHiIH{`L{`txttIEHHHEHEA$DLt}HC`HCXAGHuH}IEH8H_HH1HH]LeLmLuL}fDDvAE6LDLH{`LHC`HCXAGHuH}fUHATSHGHD`@HGxA?Hp(Hx0HSxHRPH HSL H HZ B[A\UHAUATSH11IAHI~TIc$L1MDIt8HtLID8HHuLLH[A\A]ffffff.UHH`H]LeLmLuL}IAIIH/#HC H]LeLmLuL}DMA0 uChKLHAAADЉUA1vIc$LMIGHEIWHHUCI KHuLMLMMLMHiI|(*SA1DCDɃAqDɃ4AHLLLLMLME qLHuUĉ9s  щLc 1gf.KfKLHf.ADLH>f.DCADLHSDCuzIEH8H_DEDEHHH1AIEH8LgIHHLH11^=y=lDkI$I$HHHEH1DUHAWAVAUATSHhH}LAII]HHH}DLIA@I5IE@EA0 6IGP@@EIGHHcIHEEHELUȉAW\IiI@@qH@(HNIOA;}lLMH}LmLeAH]L}HIiEHtHHTPII֐IcI6LH|AHD9+ELmLeH]L}LEHEIiHHH0q@2f.LHHhD[A\A]A^A_IGH;}NDHcHTH2H9tHzH~H7HHRHzHrH9tLBLGI8HrHr9H}LHELHH}LHELHRH@0DHD9HHlfPƒTPUIGH׋HcIH}HEqH HHHEH|pIGHUL1ɋLIEH8LoMDEMHLH1AKIEH8LoUMDMUDMHDEMH1$ALfDUHH`H]LeLmLuL}LHIHAu"H]LeLmLuL}HVPHvHIA~HCHHSPDB?DJAAFLJA$(yAHMUDDMIHMM2HDHHUDM/~%rLHHt0@DHAH@HH9uA$AD$HCPLc@uzHCHx MnHDMLHEA0 DMLLEHuHCLEifDDJAEMnHDMLHEA0 DMuEDHھ LmHuLEEHcH<rEDHھ L"EDLI KDH@DMHHEHSH@DMDBLD9KDDLHPHpDEKDDMLH@DHHEDEPLAA D@Hu@LDMHuIDDMHuLDHsHE11ҹLAEDMLLEHCEMnHDMLHEA0 DMEDHھ LMMnHDMLHEA0 DMDDHiI@@ul u;EDHھ LVLfDIH8LHH1L IH8LHH1Lffffff.UHATSH7I4Hx [A\@HGhHt7D_dE~1fA;\$d}ID$hHcӋ<ЅtI4$@$ff.UHH H]LeLmL'HM,$XIH{ht:LH{hHChA$0H]LeLmf.LfDUHHH$Ld$11L HLJ0 LH Hǃ HLHH H$Ld$f.UHAUATSH HtYE1@ AD9vAH IcHЋ%=@uLkAt_LA D9w90 t!HH H4H[A\A]f.LfDUHH H]LeLmHf{NCH}HAIHt?Mt:HHHt&HLHtDl @HDH]LeLmÐul ifDHLHuHLHuHLHufUHAVAUATSHAAE@t)D!D9t1AE[A\A]A^[A\A]A^D[A\A]1A^DUHHpH]LeLmLuL}@LHIu1H]LeLmLuL}ÐA ttHF8HtHx8uĀ tMuHLHEA$IEA$ EIHUHHPH9UtM;t/H@HI E$HEAE;AA9vHuL)HMDLLHL HUIALMHEA$% HMHUHu@LHHUDHuL LHuA}LHELMHUHu1DLHuL LHu@DLHEHM%IEH8H_HH1HH5 HUHxHxHxIHuqAAHu1DLHuL LHu@DLHEGA$LHuLA 1A$LHA$ff.UHAUATSHL/LgHHLA(HC(HCHSHsA>HHLCx1A~IP0H2LHHH HRI;P0uIHI@0HI@A@PIP(IPAPX)ЃA@\hHC8 HC@< HCH0P4H HH@ HC@8H HC0@T HC0HPH HHX HC0HPH HH` HC0L HC0@P HCHSHs1A'HH}Lfff%m @t$ 90 t H HChHt*Kd~#E1 DHChIcA<D;cd|1H[A\A]HH8H_HHH1Lfff%HH8H_HHHfUHSHHGH@HGHWHw1Au[HsA1ɺHHǃ ǃ Hǃ ǃ ǃ Hǃ H[HH8H_HH1H1fffff.UHATSHGH@HW- !HWHwA>HAu0 ǃ[DA\HH8H_>HHH1UHH0H]LeLmLuOL/GHIuNHH@@u$H;1H]LeLmLuH;H1DH5Ѐ8 IƸMtLIHC8ǃ @H80IFH8HIFIFH8@HIF IF@AF8IF@AFLHID$A$0 ǀA$l ADŽ$E1HD[A\A]A^A_@IHHHEl @A4Adž4H=L;5M/S8x9G{dHcHHHChSd1Ʌ%HChHcfLHChSd9|HChIHLLmuXsdE1AD;kdHChIcL 1IH<1tHH}H{hHChHL(ILL}IA M1MHAAA4It$xLIt$xLLI$LI$LI$LID$0P@ID$0@f1IT$0 BID$IT$ID$0IT$01LA$l A111LE1tI$H8H_>HHH1LA7DLE1"A0 L@AL 11IHL4HH8LoHH1LHEH8H_DHHH1jHAH8H_HH1Ht"GDHHH@HFHFf.UHGDJ>Dʃ@HFffffff.UH҉uHiHD7(HiHD70Hu1;PwHHUHJDȋ |䃀̀ ȉHB HFfUHGGG GGfff.UHAHȹ@E1ۃ>DODAAAFEAA@EELVEJAAAtAtAt AuU@EZDEAAADEZADEZDDEJDHt_EADJ9D tǀǀǀǀǀǀHuff.UHGDDA:EDDɃɃ@AɉHJ1҃>AЃ@AHFQPHQHPQPÐUH>tRGDHHH@HN:t>GDHHH@HBPQPQ@ A D:HNuHBԐUHH0H]LeD9BD9AGAAA9u LeH]NLHǐUDEMUDEHƋMH1AL@UHH0H]LeLmFIEGڃۃ9uA|$CLeLmEH]ÃHHDnHIHULDLMLMHU؉AHHA1DfUHAWAVAUATSHDHIcLMEIE1ɋLxGDMEAA@tHHMd@A$ C A$Sv $H[A\A]A^A_ 0A$HC8H@HP8Ht HHHuDW;DAtL E11DHcAr@w ƒ{@1AE9dA9w` A$o A$a @A$SHA T$HS8LB8Mt HLHuAyAxHs H/LIx8!HiаH HHH9tpDHE;uMMMQ Azt~tDPE;Q(uHPII7HH8H_DHHH1UIHu.HH8HWMHUHUHH1MHC Ht-HHz8t#C( AD$HC xtA $AIAG Cwo$HiH HIAG @&@AGIU(BPHH BIG1zAG &AG & DUHAVAUATSHAՀ΀IAH5HHt@I HUDHHHt\1HEHt&HEHCHCHH[A\A]A^fDHHHJ H=uH5tH1UHSHHHtH~HH[fUHSHHH6HtHSH HHH[ÐUHAUATSHIHvII9tH^LI9HuLLyH[A\A]fffff.UHAWAVAUATSH(HUUHHuDAEE+IŸMt_HEAL(Lu(c@HLDHHESHEAIt6UDHHuHUHH2H([A\A]A^A_HUL*LDHHHEHEHUHH(1[A\A]A^A_UHHPH]LeLmLuL}DNdDFPDb>AHIDFXHuȉ $A)AF$"HUAA9DBD¸u]HLuHUtNHtIMtDHsKdLL~3KdLLL"DDcXD)C\{dt HCH;Ct"1H]LeLmLuL}f.HI1Ls@UHSHHHtH6Ht}HH[fffff.UHHH$Ld$F H?AHNHIiHT(HF MiJD#(H$Ld$AIiHt(f.UHSHHHtHVH HvHH[UHSHHH6H{HH[ffffff.UHH H$Ld$Ll$Lt$HcE1HHBLb(8LpGDIt$I|$AŃAۃ@AT$PAH ЉIDH$Ld$Ll$Lt$ffffff.UHHH$Ld$&HHIHp(Hx0I$Ld$RPH HCH$DUHHpH]LeLmLuL}HIHH}HIMLMLHHELLLHHEH;EIu1H]LeLmLuL}HUHH8HWHUDEHMHHUH1HUHH8HWHUHUHHMH1HUHH8H_HULEHMLH1H$HHUHH8H_HMHMHH1fDUHAWAVAUATSHHILhL(IEHDžPHDžXHDžhHDžxLmHPHELmHEHEHX H`HPHEHEHpHHUHHUHHUM}IIw0IHHWxL IWMMQLLLHDž0IL(L8L L@E1HHHpHx@HHHHIw`IB LhHE1HHLHH1H8LPLHDžXL`LxHDžLLHHDžLHDžLHHDžLHHDž L(H0H@HDžHDI$MMFIH0HHLL\$H$LxmuHE1E1HCLK LSHL{L+HMLLLDt$H$xAH(Au1H[A\A]A^A_ff.UHH H$Ld$Ll$Lt$Aր΀IAH5HHtUAD$D#AED%ACtRI HSDHcSHC1HHLd$H$Ll$Lt$DH5p@AUD҃D@C @UH>uHF UHH@H]LeLmLuL}AH}AAAADEH5D0HHtcEEtBE̅H5D HHCHxHHC CHC HC(HLeH]LmLuL}ÐH5b@H}DHH_H1@H5WH3H}fDUHH H$Ld$Ll$Lt$DyAE|G;AՃ9wmEIMiL MeM9I$tJ1fDuHH}HދH([A\A]A^A_Ë ҉UUHGu H@HHHH(ffff.UHH@H]LeLmLuL}AՉI΀AAtQH5pHHtD`XH@@EDkdHC@HCHu/HLeH]LmLuL}fDH5HSEADHLD<$YuUAtHCHHHHCHC0CPC C8HSHS(SX)ЃC\ZHL1Gfffff.UHAWAVAUATSHHIH}HEHIAIEHMAT$DKH}ȾUă8AT$EUĉUH@HEADDEAADDMA@DU?EIiHITHB8DMDUMiLeDUMIU8AƅMԋBPHH BID$AWwAuJCtueSA HLh%AW<t  C1t[1 A$CAD$KS tOt0 fHK0HtSuQ놃( AD$AWts. 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Proposed: %u, Max: %u <4>%s %s: Not enough bandwidth on HS bus for newly activated TT. <4>%s %s: Not enough host resources, active endpoint contexts = %u <4>%s %s: Not enough bandwidth <4>%s %s: %s while waiting for %s command <4>%s %s: Not enough host controller resources for new device state. <4>%s %s: Not enough bandwidth for new device state. <4>%s %s: ERROR: Endpoint drop flag = 0, add flag = 1, and endpoint is not disabled. <4>%s %s: ERROR: Incompatible device for endpoint configure command. <3>%s %s: ERROR: unexpected command completion code 0x%x. <4>%s %s: WARN: xHCI driver setup invalid evaluate context command. <4>%s %s: WARN: slot not enabled forevaluate context command. <4>%s %s: WARN: invalid context state for evaluate context command. <4>%s %s: ERROR: Incompatible device for evaluate context command. <4>%s %s: WARN: Max Exit Latency too large <7>%s %s: xhci_hcd: Successful Endpoint Configure command <7>%s %s: xhci_hcd: Successful evaluate context command <4>%s %s: Cannot update hub desc for unknown device. <4>%s %s: Virt dev invalid for slot_id 0x%x! <4>%s %s: %s while waiting for address device command <3>%s %s: Setup ERROR: address device command for slot %d. <4>%s %s: Device not responding to set address. <4>%s %s: ERROR: Incompatible device for address device command. <4>%s %s: %s while waiting for a slot <3>%s %s: Error while assigning device slot ID <4>%s %s: Could not allocate xHCI USB device data structures <4>%s %s: %s while waiting for reset device command <4>%s %s: Unknown completion code %u for reset device command. <4>%s %s: WARN Can't disable streams for endpoint 0x%x , streams are being disabled already.<4>%s %s: WARN Can't disable streams for endpoint 0x%x , streams are already disabled!<4>%s %s: WARN xhci_free_streams() called with non-streams endpoint <4>%s %s: xHCI %s called with disabled ep %p <4>%s %s: WARN: No SuperSpeed Endpoint Companion descriptor for ep 0x%x <4>%s %s: WARN: SuperSpeed Endpoint Companion descriptor for ep 0x%x does not support streams <4>%s %s: WARN: SuperSpeed bulk endpoint 0x%x already has streams set up. <4>%s %s: Send email to xHCI maintainer and ask for dynamic stream context array reallocation. <4>%s %s: Cannot setup streams for SuperSpeed bulk endpoint 0x%x; URBs are pending. <4>%s %s: WARN: endpoints can't handle more than one stream. <4>%s %s: WARN Cannot submit config ep after reset ep command <4>%s %s: WARN deq seg = %p, deq ptr = %p <4>%s %s: FIXME allocate a new ring segment <4>%s %s: Trying to add endpoint 0x%x without dropping it. <4>%s %s: xHCI %s called with enabled ep %p <7>%s %s: xhci_hcd: %s - could not initialize ep %#x <4>%s %s: WARN: Slot ID %u, ep index %u has streams, but URB has no stream ID. <4>%s %s: WARN: Slot ID %u, ep index %u has stream IDs 1 to %u allocated, but stream ID %u is requested. <4>%s %s: WARN: Can't enqueue URB while bulk ep is transitioning to using streams. <4>%s %s: WARN: Can't enqueue URB while bulk ep is transitioning to not having streams. <4>%s %s: device LPM test failed, may disconnect and re-enumerate <4>%s %s: WARN: xHC CMD_RUN timeout <4>%s %s: WARN: xHC save state timeout <4>%s %s: Host controller not halted, aborting reset. <4>%s %s: Host not halted after %u microseconds. <3>%s %s: Host took too long to start, waited %u microseconds. <3>%s %s: Failed to allocate MSI-X entries <3>%s %s: No msi-x/msi found and no IRQ in BIOS <3>%s %s: request interrupt %d failed <4>%s %s: WARN: xHC restore state timeout Enabling 64-bit DMA addresses. Could not allocate xHCI command structure. Could not allocate xHCI TT structure. xHCI version %x needs hub TT think time and number of ports xHCI version %x doesn't need hub TT think time or number of ports FIXME allocate a new ring segment Not enough ep ctxs: %u active, need to add %u, limit is %u. Adding %u ep ctxs, %u now active. Recalculating BW for rootport %u Recalculating BW for TT slot %u port %u Final bandwidth: %u, Limit: %u, Reserved: %u, Available: %u percent Successful Endpoint Configure command Successful evaluate context command Removing %u failed ep ctxs, %u now active. Removing %u dropped ep ctxs, %u now active. port %d entered L1 state, port status 0x%x port %d software lpm failed, L1 status %d FIXME: allocate a command ring segment Successful Address Device command Slot ID %d dcbaa entry @%p = %#016llx Output Context DMA address = %#08llx Not enough ep ctxs: %u active, need to add 1, limit is %u. Adding 1 ep ctx, %u now active. The device to be reset with slot ID %u does not exist. Re-allocate the device The device to be reset with slot ID %u does not match the udev. Re-allocate the device Resetting device with slot ID %u Couldn't allocate command structure. Successful reset device command. Output context after successful reset device cmd: Dropped %u ep ctxs, flags = 0x%x, %u now active. Driver wants %u stream IDs (including stream 0). Need %u stream ctx entries for %u stream IDs. Slot %u ep ctx %u now has streams. Ep 0x%x only supports %u stream IDs. xHCI HW only supports %u stream ctx entries. Endpoint 0x%x not halted, refusing to reset. Control endpoint stall already handled. Queueing reset endpoint command Cleaning up stalled endpoint ring Setting up input context for configure endpoint command Output context after successful config ep cmd: %s - could not initialize ep %#x xHCI %s - can't add slot or ep 0 %#x add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x xHCI %s - can't drop slot or ep 0 %#x drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x Ep 0x%x: URB %p to be canceled on non-responsive xHCI host. Cancel URB %p, dev %s, ep 0x%x, starting at offset 0x%llx urb submitted during PCI suspend Ep 0x%x: URB %p submitted for non-responsive xHCI host. Max Packet Size for ep 0 changed. Max packet size in usb_device = %d Max packet size in xHCI HW = %d Issuing evaluate context command. // Disabling event ring interrupts xhci_stop completed - status = %x // Setting command ring address to 0x%llx Compliance Mode Recovery Timer Initialized. Compliance Mode Detected->Port %d! Compliance Mode Recovery Timer Deleted! xhci_shutdown completed - status = %x Command ring memory map follows: // Set the interrupt modulation register // Enable interrupts, cmd = 0x%x. // Enabling event ring interrupter %p by writing 0x%x to irq_pending Finished xhci_run for USB2 roothub Finished xhci_run for USB3 roothub QUIRK: Not clearing Link TRB chain bits. xHCI doesn't need link TRB QUIRK Wait for controller to be ready for doorbell rings <4>%s %s: ep %#x - rounding interval to %d microframes, ep desc says %d microframes <4>%s %s: ep %#x - rounding interval to %d %sframes <4>%s %s: Slot ID %d is not assigned to this device <4>%s %s: WARN: Didn't find a matching TT <4>%s %s: WARN: %s TRB math test %d failed! <4>%s %s: Tested TRB math w/ seg %p and input DMA 0x%llx <4>%s %s: starting TRB %p (0x%llx DMA), ending TRB %p (0x%llx DMA) <4>%s %s: Expected seg %p, got seg %p <4>%s %s: WARN no SS endpoint companion descriptor. /builddir/build/BUILD/kernel-2.6.32-358.el6/linux-2.6.32-358.el6.x86_64/arch/x86/include/asm/dma-mapping.h<4>%s %s: Slot %u endpoint %u not removed from BW list! xHCI 256 byte stream ctx arrays<4>%s %s: WARN something wrong with SW event ring dequeue ptr. <3>%s %s: No Extended Capability registers, unable to set up roothub. <4>%s %s: Ignoring unknown port speed, Ext Cap %p, revision = 0x%x <4>%s %s: Duplicate port entry, Ext Cap %p, port %u <4>%s %s: Port was marked as USB %u, duplicated as USB %u <4>%s %s: No ports on the roothubs? <4>%s %s: Couldn't initialize memory <4>%s %s: WARN: no supported page size Supported page size register = 0x%x // xHC can handle at most %d device slots. // Setting Max device slots reg = 0x%x. // Device context base array address = 0x%llx (DMA), %p (virt) // Setting command ring address to 0x%x // Doorbell array is located at offset 0x%x from cap regs base addr // Allocated event ring segment table at 0x%llx Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx // Write ERST size = %i to ir_set 0 (some bits preserved) // Set ERST entries to point to event ring. // Set ERST base address for ir_set 0 = 0x%llx Wrote ERST address to ir_set 0. // Write event ring dequeue pointer, preserving EHB bit Allocating %d scratchpad buffers Found %u USB 2.0 ports and %u USB 3.0 ports. Limiting USB 3.0 roothub ports to 15. Limiting USB 2.0 roothub ports to %u. USB 2.0 port at index %u, addr = %p USB 3.0 port at index %u, addr = %p Ext Cap %p, port offset = %u, count = %u, revision = 0x%x xHCI 0.96: support USB2 software lpm xHCI 1.0: support USB2 software lpm xHCI 1.0: support USB2 hardware lpm Freed small stream array pool Freed medium stream array pool FIXME xHCI doesn't support wireless speeds Set fake root hub portnum to %d Slot %d output ctx = 0x%llx (dma) Slot %d input ctx = 0x%llx (dma) Set slot id %d dcbaa entry %p to 0x%llx Setting number of stream ctx array entries to %u Allocating %u streams and %u stream context array entries. Command ring has no reserved TRBs available Setting stream %d ring ptr to 0x%08llx ring expansion succeed, now has %d segments Cached old ring, %d ring%s cached Ring cache full (%d rings), freeing ring <4>%s %s: WARN: Slot ID %u, ep index %u has streams, but URB has no stream ID. <4>%s %s: WARN: Slot ID %u, ep index %u has stream IDs 1 to %u allocated, but stream ID %u is requested. <3>%s %s: %s - ep %#x - Miscalculated number of TRBs, %d left <3>%s %s: %s - ep %#x - Miscalculated tx length, queued %#x (%d), asked for %#x (%d) <4>%s %s: WARN urb submitted to disabled ep <4>%s %s: WARN waiting for error on ep to be cleared <3>%s %s: ERROR unknown endpoint state for ep <3>%s %s: Do not support expand command ring <3>%s %s: Ring expansion failed <3>%s %s: ERR: No room for command on command ring <3>%s %s: ERR: Reserved TRB counting for unfailable commands failed. <4>%s %s: WARN Cannot submit Set TR Deq Ptr <4>%s %s: WARN deq seg = %p, deq pt = %p <4>%s %s: A Set TR Deq Ptr command is pending. <4>%s %s: WARN can't find new dequeue state for invalid stream ID %u. <7>%s %s: xhci_hcd: Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s) <3>%s %s: ISOC TD length unmatch <4>%s %s: WARN: sg dma xfer crosses 64KB boundaries! <4>%s %s: Stop endpoint command completion for disabled slot %u <4>%s %s: WARN Cancelled URB %p has invalid stream ID %u. <4>%s %s: WARN Set TR deq ptr command for freed stream ID %u <4>%s %s: WARN Set TR Deq Ptr cmd invalid because of stream ID configuration <4>%s %s: WARN Set TR Deq Ptr cmd failed due to incorrect slot or ep state. <4>%s %s: WARN Set TR Deq Ptr cmd failed because slot %u was not enabled. <4>%s %s: WARN Set TR Deq Ptr cmd with unknown completion code of %u. <4>%s %s: Mismatch between completed Set TR Deq Ptr command & xHCI internal state. <4>%s %s: ep deq seg = %p, deq ptr = %p <4>%s %s: Reset device command completion for disabled slot %u <4>%s %s: URB transfer length is wrong, xHC issue? req. len = %u, act. len = %u <4>%s %s: WARNING: Host System Error <4>%s %s: WARN: xHC returned failed port status event <4>%s %s: Event for port %u not in Extended Capabilities, ignoring. <4>%s %s: Event for port %u duplicated inExtended Capabilities, ignoring. <4>%s %s: xHC is not running. <3>%s %s: ERROR Transfer event pointed to bad slot <3>%s %s: @%016llx %08x %08x %08x %08x <3>%s %s: ERROR Transfer event for disabled endpoint or incorrect stream ring <4>%s %s: WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk? <4>%s %s: WARN: TRB error on endpoint <4>%s %s: WARN: HC couldn't access mem fast enough <4>%s %s: WARN: bandwidth overrun event on endpoint <4>%s %s: WARN: buffer overrun event on endpoint <4>%s %s: WARN: detect an incompatible device<4>%s %s: WARN Event TRB for slot %d ep %d with no TDs queued? <3>%s %s: ERROR Transfer event TRB DMA ptr not part of current TD <4>%s %s: WARN: Success on ctrl setup TRB without IOC set?? <4>%s %s: WARN: Success on ctrl data TRB without IOC set?? <4>%s %s: WARN Successful completion on short TX <4>%s %s: HC gave bad length of %d bytes left <4>%s %s: Device Notification event for unused slot %u <4>%s %s: WARN something wrong with SW event ring dequeue ptr. <4>%s %s: ERROR Unknown event condition, HC probably busted <4>%s %s: xHCI host not responding to stop endpoint command. <4>%s %s: Assuming host is dying, halting host. <4>%s %s: Non-responsive xHCI host is not halting. <4>%s %s: Completing active URBs anyway. <4>%s %s: Abort the command ring, but the xHCI is dead. <4>%s %s: Queuing command descriptor failed. <3>%s %s: Stopped the command ring failed, maybe the host is dead <3>%s %s: Abort command ring failed WARN halted endpoint, queueing URB anyway. ERROR no room on ep ring, try ring expansion Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s) Can't prepare ring for bad stream ID %u Address = %p (0x%llx dma); in seg %p (0x%llx dma) Next boundary at %#x, end dma = %#x xHCI dying, ignoring interrupt. Shouldn't IRQs be disabled? xHCI host dying, returning from event handler. Completed config ep cmd - last ep index = %d, state = %d Completed reset device command. NEC firmware version %2x.%02x Removing canceled TD starting at 0x%llx (dma). Slot state = %u, EP state = %u Successful Set TR Deq Ptr cmd, deq = @%08llx Unable to find new dequeue pointer Ignoring reset ep completion code of %u Queueing configure endpoint command Port Status Change Event for port %d port resume event for port %d Underrun Event for slot %d ep %d still with TDs queued? Overrun Event for slot %d ep %d still with TDs queued? Miss service interval error, set skip flag Event TRB with TRB type ID %u td_list is empty while skip flag set. Clear skip flag. All tds on the ep_ring skipped. Clear skip flag. event_trb is a no-op TRB. Skip it Giveback URB %p, len = %d, expected = %d, status = %d TRB error code %u, halted endpoint index = %u Waiting for status stage event ep %#x - asked for %d bytes, %d bytes untransferred Device Wake Notification event for slot ID %u Vendor specific event TRB type = %u Vendor defined info completion code %u Stop EP timer ran, but another timer marked xHCI as DYING, exiting. Stop EP timer ran, but no command pending, exiting. Killing URBs for slot ID %u, ep index %u xHCI host controller is dead. Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), new deq ptr = %p (0x%llx dma), new cycle = %u Finding segment containing stopped TRB. Finding segment containing last TRB in TD. New dequeue segment = %p (virtual) New dequeue pointer = 0x%llx (DMA) The command ring isn't running, Have the command ring been stopped? Command ring had been stopped <4>%s %s: %s while waiting for stop endpoint command <4>%s %s: USB core suspending device not in U0/U1/U2. <4>%s %s: Cannot set link state. suspend failed because a port is resuming Couldn't allocate command structure. Wrong hub descriptor type for USB 3.0 roothub. get port status, actual port %d status = 0x%x Get port status returned 0x%x set port power, actual port %d status = 0x%x set port reset, actual port %d status = 0x%x set port remote wake mask, actual port %d status = 0x%x clear port %s change, actual port %d status = 0x%x Ignoring request to disable SuperSpeed port. disable port, actual port %d status = 0x%x All USB3 ports have entered U0 already! Compliance Mode Recovery Timer Deleted. @%p (virt) @%08llx (dma) %#08x - drop flags @%p (virt) @%08llx (dma) %#08x - add flags @%p (virt) @%08llx (dma) %#08x - rsvd2[%d] @%p (virt) @%08llx (dma) %#08llx - rsvd64[%d] @%p (virt) @%08llx (dma) %#08x - dev_info @%p (virt) @%08llx (dma) %#08x - dev_info2 @%p (virt) @%08llx (dma) %#08x - tt_info @%p (virt) @%08llx (dma) %#08x - dev_state @%p (virt) @%08llx (dma) %#08x - rsvd[%d] @%p (virt) @%08llx (dma) %#08x - ep_info @%p (virt) @%08llx (dma) %#08x - ep_info2 @%p (virt) @%08llx (dma) %#08llx - deq @%p (virt) @%08llx (dma) %#08x - tx_info // xHC command ring deq ptr low bits + flags = @%08x // xHC command ring deq ptr high bits = @%08x Dev %d endpoint %d stream ID %d: Ring deq = %p (virt), 0x%llx (dma) Ring enq = %p (virt), 0x%llx (dma) Next ring segment DMA address = 0x%llx DMA address or buffer contents= %llu Unknown TRB with TRB type ID %u xHCI capability registers at %p: CAPLENGTH AND HCIVERSION 0x%x: Isoc scheduling threshold: %u Maximum allowed segments in event ring: %u Worst case U1 device exit latency: %u Worst case U2 device exit latency: %u HC generates %s bit addresses FIXME: more HCCPARAMS debugging xHCI operational registers at %p: HC has %sfinished hard reset Host System Error Interrupts %s HC has %sfinished light reset xHCI runtime registers at %p: %p: Microframe index = 0x%x %p: ir_set.erst_size = 0x%x WARN: %p: ir_set.rsvd = 0x%x %p: ir_set.erst_base = @%08llx %p: ir_set.erst_dequeue = @%08llx // xHCI capability registers at %p: // @%p = 0x%x (CAPLENGTH AND HCIVERSION) // xHCI operational registers at %p: // xHCI runtime registers at %p: QUIRK: Fresco Logic xHC needs configure endpoint cmd after reset endpoint QUIRK: Fresco Logic revision %u has broken MSI implementation evaluate contextconfigure endpointSignalTimeoutdrivers/usb/host/xhci.cHewlett-PackardZ420Z620Z820Z1xhci_hcdResetting HCD Reset complete Calling HCD init Called HCD init Set up %s for hub device. Slot %u Input Context: Slot %u Output Context: software LPM test succeed invalid port number %d test port %d software LPM resumed port %d status 0x%x port L1 resume fail %s port %d USB2 hardware LPM Bad Slot ID %d Slot ID %d Input Context: Slot ID %d Output Context: Op regs DCBAA ptr = %#016llx Internal device address = %d Input Context: Queueing new dequeue state %s called for udev %p New Input Control Context: HW died, freeing TD. Slot %d input context Slot %d output context Stop HCD cleaning up memory Initialize the xhci_hcd Start the primary HCD Start the secondary HCD Attempting Recovery routine! xhci_run ERST memory map follows: Event ring: ERST deq = 64'h%0lx // Turn on HC, cmd = 0x%x. Failed to enable MSI-X disable MSI-X interrupt failed to allocate MSI entry disable MSI interrupt xhci_init Finished xhci_init // Reset the HC // Halt the HC microdrivers/usb/host/xhci-mem.cSimpleComplex<4>%s %s: Bad Slot ID %d xHCI ring segmentsxHCI input/output contextsxHCI 1KB stream ctx arraysxhci_hcdSupported page size of %iK HCD page size set to %iK Allocated command ring at %p First segment DMA is 0x%llx // Allocating event ring TRB math tests passed. Freed ERST Freed event ring Freed command ring Freed segment pool Freed device context pool Set root hub portnum to %d udev->tt = %p udev->ttport = 0x%x Bad real port. drivers/usb/host/xhci-ring.cscancelled<4>%s %s: Invalid port id %d killedxhci_hcdIsoc URB with zero packets? Cancel (unchain) link TRB TRB to noop at offset 0x%llx Completed config ep cmd resume root hub remote wake SS port %d resume HS port %d resume SS port %d finished Event ring: Stopped on Transfer TRB Stopped on No-op or Link TRB Stalled endpoint Transfer error on endpoint Babble error on endpoint underrun event on endpoint overrun event on endpoint Found td. Clear skip flag. Treating code as success. Calling usb_hc_died() Finding endpoint context Cycle state = 0x%x Abort command ring // Ding dong! SignalTimeout<4>%s %s: slot_id is zero xhci_hcddrivers/usb/host/xhci-hub.cport %d not suspended Resume USB2 port %d set port %d resume slot_id is zero clear USB_PORT_FEAT_SUSPEND PORTSC %04x reservedxhci_hcddrivers/usb/host/xhci-dbg.cSlot Context: Endpoint %02d Context: @%016llx %08x %08x %08x %08x Dev %d endpoint ring %d: Ring has not been updated Ring deq updated %u times Ring enq updated %u times Link TRB: Interrupter target = 0x%x Cycle bit = %u Toggle cycle bit = %u No Snoop bit = %u Command TRB pointer = %llu Completion status = %u Flags = 0x%x Offset 0x%x = 0x%x CAPLENGTH: 0x%x HCIVERSION: 0x%x HCSPARAMS 1: 0x%x Max device slots: %u Max interrupters: %u Max ports: %u HCSPARAMS 2: 0x%x HCSPARAMS 3 0x%x: HCC PARAMS 0x%x: RTSOFF 0x%x: USBCMD 0x%x: HC is %s Event Interrupts %s USBSTS 0x%x: Event ring is %sempty %sHost System Error %p port %s reg = 0x%x WARN: %p: Rsvd[%i] = 0x%x %p: ir_set[%i] %p: ir_set.pending = 0x%x %p: ir_set.control = 0x%x // CAPLENGTH: 0x%x // @%p = 0x%x RTSOFF // @%p = 0x%x DBOFF // Doorbell array at %p: enabled/disableddefaultaddressedconfiguredxhci_hcddrivers/usb/host/xhci-pci.cGot SBRN %u MWI active Finished xhci_pci_reinit QUIRK: Resetting on resume xHCI Host ControllerJ!JVV O(08@C}}}}}}}}}}}}}}}K(B0uC8C@nDHEEPLFXF`IhzLpXMx NO8PbQUEU0* n  ( 0 8 @ H P X ` hepxu"u2!"r$"*r,||E||%|f|%|2 |(|%0|8|@|H| P|e X| `| h| p|E x|u | | | ||||5|||%|&|&|='|0(|5|6| 9|P|BQ|S (%08@HRP%X`hRp x%u%5EL2 Kg~I2>^3 a3l3$l(30s43<t@3HitL3T٤X`d@#Rmodule_layout usb_root_hub_lost_power="pci_bus_read_config_byte\4Z__kmalloc-usb_create_shared_hcdmsleepx6usb_add_hcdiparam_get_intcdel_timerDusb_remove_hcdusb_hcd_pci_removecpu_online_maskg}dma_set_maskˑmalloc_sizes,rusb_disable_xhci_portsR usb_is_intel_switchable_xhcipci_disable_msix=+dynamic_debug_enabled21usb_hcd_poll_rh_statuss8_spin_lock?'usb_amd_find_chipset_info?sg_nextG6x86_dma_fallback_dev__const_udelay&jinit_timer_key@khweight32#&usb_hcd_giveback_urb%Kparam_set_int*q_spin_lock_irqsaveTdma_pool_destroyA߹usb_amd_dev_puth}jiffiesC__list_addwu:usb_put_hcd__init_waitqueue_head,usb_amd_quirk_pll_enable7printk_ratelimitB|nr_cpu_idsxusb_hcd_is_primary_hcddel_timer_sync memset 8usb_hcd_link_urb_to_ep!={pci_enable_msixcsprintk_spin_lock_irql]usb_amd_quirk_pll_disableDusb_hcd_pci_shutdown9mcountR0warn_slowpath_nullmper_cpu__kernel_stack_7usb_hcd_pci_pm_ops[D!list_del&mstrstryK_spin_unlock_irqrestorecEEmod_timerZNdma_pool_freeO^Fadd_timermrequest_threaded_irqދ\`radix_tree_deleteu#synchronize_irqdzusb_hcd_check_unlink_urbOxpci_set_mwiusb_enable_xhci_portsNOvxpv_irq_opsusb_hcd_irq;msecs_to_jiffies􀴜dynamic_debug_enabledtJwait_for_completion_interruptible_timeoutdev_driver_stringiedma_pool_alloc5hpci_unregister_driverD kmem_cache_alloc_trace zkfree-$pci_disable_msiϱ usb_wakeup_notification___pci_register_drivermradix_tree_lookupqѻL__bitmap_weight:Vcompletekzjpci_enable_msi_block[7cusb_hc_diedtlusb_hcd_unlink_urb_from_ep<>usb_hcd_pci_probe#eusb_hcd_resume_root_hub)Fradix_tree_insertdma_pool_create< dev_get_drvdataҁndma_opsث free_irqdmi_get_system_info P (P2?2\2a2e2k2p2222222 2 2s2x2=2E2H222*2222 22.232D2G22=2]2f222222222 2 2 2 2 2 2 2 21 2[ 2 2 2 2 2 2 2K 2 2u 2 2 2! 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X. h. p.sx. .s . .s. .E. .s. .~ . .s. . / /s/ / 0/ 8/s@/ H/ X/ `/sh/ p/F/ /s/ / / /s/ / / /s/ / / 0s0 0(F 0 (000 80 H0 P0X0 `0PFp0 x00 0xF0 00 0) 0 00 0: 0 00 1L 1 1 1 (1_ 81 @1H1 P1w `1 h1p1 x1 1 11 1 1 11 1F1 11 1F2 22 2 (2 0282 @2FP2 X2`2 h2 Gx2 22 2 2 22 2PG2 22 2xG2 23 3 3 3(3 03G@3 H3P3 X3 h3 p3x3 3 3 33 3G3 33 3 3 33 3G4 44 4H04 84@4 H4 X4 `4h4 p4% 4 44 4> 4 44 4 4 404 4U 4 5P5 58H 5 (5P05 85XHH5 P5PX5 `5l p5 x5p5 5 5 5p5 5 5 5p5 5 5 5p5 6xH6 6p 6 (6H86 @6pH6 P6H`6 h6pp6 x6H6 66 6I6 66 60I6 66 6 7 77 7`I(7 0787 @7 P7 X7`7 h7Ix7 77 7 7 77 7 7^ 77g 7 7^ 78g 8 8^ 8(8g 08 @8^ H8P8g X8Ih8^ p8x8g 8J8^ 88g 8 xhci_hcd n Hdmodule.sigFQ& j@_'HK؊7m4 9l7m>1:8/@ݻ     "# p`J,E @@Xi,wpS` e" H(1 (B Q `$q  0 06X  @ ( PBu`CzCv6`DO"Z l}@68(  ( ((P()x(:(K(\(m |(@(h((((( 0( "X(3(D S(d(u(  @p( `( !( ( $(58(F`(W(h(y( ( ((P(x(((((0@(Ah(R(c(t $( @'(0(X(((( ( (+H(<p(M $\(m #|( ( (8 (` ( # ( P (  p/ (@ (Q( (b qP (x ( ( ( ( (h ( ( (  (  (, 0 (=  L X (]  (n  (  (  (    ( H ( p (  (  (  (   % (6 8(G `(X (i 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($$$#$ !$A $$`;$ %%l.% J=%E%$Y%i%y% %I~%%+%p %%&, &0&:A&M& 0[&p&y&&gK&  &&&_&0]'M$'pfI'_'0zr'')'''p\o'''@3u(pb(} (m:3(>D(YH[(@Z7{(<(_(((03(,(() g() B)l)` })`b.)O))"))()*\o#*/*0^[O*Z* * m*0|*z*,*P9*i*++03++&C+\+Pm+|+p&+++w+++of, @,p31,F,Y,0f1k,u,,,,,,,,, ,-Ol-Z40-1D-Y-`8m-Ж<----U"--PQn-0#..8.p%P.`.@|.....И.... /%/;/wxR/me/q/Pr/07K///Ѕ//PM/` //0>40B0pLM0 \0Y1l000$0>000P001,1 151pY6G1W1_10e2n10Ex11111pE16124n292@+S2pevt2`p222A222A2.33o`*393C3Q3Z5e3@Fko3{3 3`\30,3F53]33^44!4 d 54N43[4xhci.cCSWTCH.1058xhci_get_ss_bw_consumedxhci_calculate_hird_beslxhci_besl_encodingxhci_hcd_cleanupxhci_hcd_initxhci_check_argsxhci_setup_input_ctx_for_config_epxhci_count_num_new_endpointsxhci_add_ep_to_interval_tablexhci_reserve_bandwidthxhci_configure_endpoint__key.11666descriptor.36269descriptor.36212__func__.38970__func__.38649xhci_zero_in_ctx__func__.37231__func__.35904__func__.37718xhci_set_cmd_ring_deq__func__.37369__func__.36048descriptor.36052__func__.35484xhci_free_irqxhci_cleanup_msixcompliance_mode_recovery_timer_initcompliance_mode_recoverylink_quirk__mod_license4217__mod_author4216__mod_description4215__mod_link_quirk38__mod_link_quirktype37__param_link_quirk__param_str_link_quirkdescriptor.40320__func__.40321descriptor.40325descriptor.40328descriptor.40331descriptor.40334descriptor.40337descriptor.40064__func__.40065descriptor.40071descriptor.40077descriptor.40080descriptor.40086descriptor.40089descriptor.40092descriptor.37085__func__.37086descriptor.36349__func__.36350descriptor.36353descriptor.36565__func__.36566descriptor.36569descriptor.36572descriptor.36586__func__.36213__func__.36270descriptor.36414__func__.36415descriptor.36453__func__.36454descriptor.40007__func__.40008descriptor.39672__func__.39673descriptor.39676descriptor.39685descriptor.39688descriptor.39697descriptor.39700descriptor.39923__func__.39924descriptor.39248__func__.39249descriptor.39254descriptor.39263descriptor.39275descriptor.39279descriptor.39282descriptor.39285descriptor.39288descriptor.39291descriptor.39294descriptor.39297descriptor.39123__func__.39124descriptor.39049__func__.39050descriptor.39053descriptor.38983descriptor.38650descriptor.38653descriptor.38656descriptor.38659descriptor.38665descriptor.38684descriptor.38699descriptor.38589__func__.38590descriptor.37420__func__.37421descriptor.38319__func__.38320descriptor.38323descriptor.38341descriptor.38355descriptor.38184__func__.38185descriptor.37783__func__.37784descriptor.37596__func__.37597descriptor.37600descriptor.37603descriptor.37498__func__.37499descriptor.37502descriptor.37505descriptor.37370descriptor.37232descriptor.37235descriptor.37238descriptor.36049descriptor.36055descriptor.35905descriptor.35908descriptor.35911descriptor.35737__func__.35738descriptor.35747descriptor.35750descriptor.35485descriptor.35518descriptor.35310__func__.35311descriptor.35314descriptor.35317descriptor.35320descriptor.35323descriptor.35326descriptor.34974__func__.34975descriptor.34978descriptor.34981descriptor.34984descriptor.34987descriptor.34990descriptor.34993descriptor.34816__func__.34817descriptor.34133__func__.34134descriptor.34048__func__.34049descriptor.34052descriptor.34883__func__.34884descriptor.34725__func__.34726descriptor.34618__func__.34619descriptor.34622descriptor.34625descriptor.34372__func__.34373descriptor.34376descriptor.34379descriptor.34382descriptor.34385descriptor.34388descriptor.34391descriptor.34394descriptor.34397descriptor.34325__func__.34326descriptor.33613__func__.33614descriptor.33871__func__.33872descriptor.33880descriptor.33771__func__.33772descriptor.33775descriptor.34209__func__.34210descriptor.34214descriptor.34217descriptor.34220descriptor.33669__func__.33670descriptor.33673descriptor.33562__func__.33563xhci-mem.cxhci_link_segmentsxhci_microframes_to_exponentxhci_parse_exponent_intervalxhci_segment_allocxhci_segment_freexhci_free_segments_for_ringxhci_alloc_segments_for_ringxhci_free_container_ctxxhci_test_trb_in_tdxhci_check_trb_in_td_mathxhci_alloc_container_ctx__key.10561xhci_free_tt_infoxhci_ring_alloc.clone.0descriptor.36308__func__.36309descriptor.36315descriptor.36318descriptor.36321descriptor.36324descriptor.36328descriptor.36331descriptor.36334descriptor.36337descriptor.36340descriptor.36343descriptor.36346descriptor.36356descriptor.36359descriptor.36362descriptor.36365descriptor.35736__func__.35737descriptor.35811__func__.35812descriptor.35226__func__.35227descriptor.36065__func__.36066descriptor.36069descriptor.36072descriptor.36076descriptor.36082descriptor.35875__func__.35876descriptor.35879descriptor.35882descriptor.35885descriptor.35395__func__.35396descriptor.35399descriptor.35402descriptor.35417descriptor.35420descriptor.35423descriptor.35426descriptor.34573__func__.34574descriptor.34582descriptor.34585descriptor.34598descriptor.34601descriptor.34610descriptor.34378__func__.34379descriptor.34212__func__.34213descriptor.34102__func__.34103descriptor.33965__func__.33966descriptor.33969descriptor.33976descriptor.33737__func__.33738descriptor.33634__func__.33635descriptor.33638.LC5xhci-ring.cinc_deqring_doorbell_for_active_ringstd_to_noopqueue_trbxhci_triad_to_transfer_ringcheck_trb_math__func__.35252prepare_ringqueue_commandprepare_transferdescriptor.35969xhci_urb_to_transfer_ringdescriptor.35294xhci_complete_cmd_in_cmd_wait_listhandle_cmd_in_cmd_wait_listxhci_giveback_urb_in_irqhandle_cmd_completionxhci_cleanup_halted_endpointfinish_tddescriptor.35006__func__.35007descriptor.35015__func__.35970descriptor.35796__func__.35797descriptor.35150__func__.35151descriptor.31902__func__.31903descriptor.31906descriptor.31909descriptor.35408__func__.35409__func__.35295descriptor.34882__func__.34883descriptor.34806__func__.34807descriptor.32894__func__.32895descriptor.32898descriptor.32908descriptor.32912descriptor.32128__func__.32129descriptor.32546__func__.32547descriptor.32552descriptor.32477__func__.32478descriptor.32677__func__.32678descriptor.32681descriptor.33219__func__.33220descriptor.33224descriptor.33227descriptor.33230descriptor.33233descriptor.33236descriptor.34129__func__.34130descriptor.34143descriptor.34147descriptor.34151descriptor.34157descriptor.34161descriptor.34168descriptor.34171descriptor.34176descriptor.34179descriptor.34184descriptor.34188descriptor.34191descriptor.34194descriptor.34199descriptor.34202descriptor.34205descriptor.33741__func__.33742descriptor.33746descriptor.33990__func__.33991descriptor.33155__func__.33156descriptor.33083__func__.33084descriptor.33572__func__.33573descriptor.33576descriptor.32248__func__.32249descriptor.32255descriptor.32269descriptor.32291descriptor.32294descriptor.32021__func__.32022descriptor.31708__func__.31709descriptor.31713descriptor.31716descriptor.31720descriptor.31723descriptor.31726descriptor.31486__func__.31487descriptor.31361__func__.31362descriptor.31365descriptor.31368descriptor.31318__func__.31319.LC15xhci-hub.cxhci_stop_device.clone.0usb_bos_descriptordescriptor.29228__func__.29229descriptor.29235descriptor.28110__func__.28111descriptor.28530__func__.28531descriptor.28540descriptor.28549descriptor.28552descriptor.28555descriptor.28558descriptor.28603descriptor.28607descriptor.28611descriptor.28618descriptor.28621descriptor.28630descriptor.28297__func__.28298descriptor.28220__func__.28221descriptor.28224descriptor.28431__func__.28432descriptor.28435xhci-dbg.cCSWTCH.572descriptor.30294__func__.30295descriptor.30298descriptor.30301descriptor.29860__func__.29861descriptor.29922__func__.29923descriptor.29926descriptor.29929descriptor.29932descriptor.29935descriptor.29938descriptor.30104__func__.30105descriptor.30108descriptor.30111descriptor.30114descriptor.30117descriptor.30120descriptor.29795__func__.29796descriptor.29799descriptor.29746__func__.29747descriptor.29668__func__.29669descriptor.29675descriptor.29620__func__.29621descriptor.29509__func__.29510descriptor.29513descriptor.29516descriptor.29519descriptor.29462__func__.29463descriptor.29190__func__.29191descriptor.29194descriptor.29197descriptor.29200descriptor.29203descriptor.29206descriptor.29211descriptor.29215descriptor.29218descriptor.29221descriptor.29225descriptor.29146__func__.29147descriptor.28040__func__.28041descriptor.28044descriptor.28047descriptor.28050descriptor.28053descriptor.28056descriptor.28059descriptor.28062descriptor.28065descriptor.28068descriptor.28071descriptor.28074descriptor.28077descriptor.28080descriptor.28083descriptor.28086descriptor.28089descriptor.28092descriptor.28774__func__.28775descriptor.28479__func__.28480descriptor.28483descriptor.28486descriptor.28489descriptor.28492descriptor.28495descriptor.28654__func__.28655descriptor.28658descriptor.28661descriptor.28664descriptor.28814__func__.28815descriptor.29050__func__.29051descriptor.29054descriptor.29057descriptor.28866__func__.28867descriptor.28870descriptor.28873descriptor.28876descriptor.28879descriptor.28882descriptor.28885descriptor.27839__func__.27840descriptor.27843descriptor.27846descriptor.27849descriptor.27852descriptor.27855descriptor.27858descriptor.27861xhci-pci.cxhci_pci_resumexhci_pci_suspendxhci_pci_setupxhci_pci_quirksxhci_pci_driverxhci_pci_removexhci_pci_probedescriptor.33647__func__.33648descriptor.33459__func__.33460descriptor.33463descriptor.33523__func__.33524descriptor.33527descriptor.33530hcd_namepci_idsxhci_pci_hc_driverxhci-hcd.mod.c_rheldata__mod_srcversion119__mod_alias117__module_depends____versions__mod_vermagic5dmi_get_system_infofree_irqxhci_get_input_control_ctxxhci_alloc_devdma_opsxhci_get_block_sizedev_get_drvdatadma_pool_createxhci_debug_segmentxhci_suspendradix_tree_insertxhci_queue_evaluate_contextxhci_dbg_ep_ringsusb_hcd_resume_root_hubusb_hcd_pci_probexhci_register_pciusb_hcd_unlink_urb_from_epxhci_urb_dequeueusb_hc_died__this_modulepci_enable_msi_blockcompletexhci_is_vendor_info_codexhci_setup_no_streams_ep_input_ctxxhci_dbg_ring_ptrs__bitmap_weightradix_tree_lookupxhci_ring_devicexhci_set_remote_wake_maskxhci_gen_setupxhci_copy_ep0_dequeue_into_input_ctx__pci_register_driverxhci_queue_ctrl_txcleanup_modulexhci_set_link_stateusb_wakeup_notificationpci_disable_msixhci_slot_copykfreexhci_hub_status_dataxhci_cleanup_stalled_ringxhci_free_devxhci_mem_cleanupxhci_alloc_commandxhci_urb_enqueuexhci_stream_id_to_ringxhci_setup_streams_ep_input_ctxxhci_trb_virt_to_dmaxhci_address_devicekmem_cache_alloc_tracepci_unregister_driverxhci_debug_ringinit_moduledma_pool_allocdev_driver_stringxhci_update_tt_active_epsxhci_queue_vendor_commandwait_for_completion_interruptible_timeoutxhci_hub_controlxhci_urb_free_privxhci_alloc_virt_devicexhci_last_valid_endpointxhci_ring_cmd_dbdynamic_debug_enabledxhci_test_and_clear_bitmsecs_to_jiffiesxhci_endpoint_copyusb_hcd_irqxhci_setup_addressable_virt_devpv_irq_opsxhci_drop_endpointxhci_free_virt_devicexhci_free_stream_infoxhci_queue_configure_endpointxhci_queue_stop_endpointxhci_drop_ep_from_interval_tableusb_enable_xhci_portspci_set_mwixhci_get_endpoint_indexxhci_queue_reset_deviceusb_hcd_check_unlink_urbxhci_bus_suspendxhci_get_framexhci_free_streamsxhci_get_endpoint_flag_from_indexxhci_dbg_regsxhci_dbg_ctxsynchronize_irqradix_tree_deletexhci_endpoint_zero__mod_pci_device_tablexhci_dma_to_transfer_ringrequest_threaded_irqxhci_queue_bulk_txxhci_free_commandadd_timerdma_pool_freemod_timer_spin_unlock_irqrestorestrstrlist_delusb_hcd_pci_pm_opsper_cpu__kernel_stackwarn_slowpath_nullxhci_dbg_erstmcountxhci_shutdownxhci_clear_endpoint_bw_infoxhci_queue_reset_epusb_hcd_pci_shutdownxhci_print_run_regsxhci_ring_ep_doorbellusb_amd_quirk_pll_disable_spin_lock_irqxhci_discover_or_reset_devicexhci_resumeprintkxhci_runxhci_get_largest_overheadxhci_port_state_to_neutralxhci_queue_new_dequeue_statexhci_queue_slot_controlpci_enable_msixxhci_find_new_dequeue_stateusb_hcd_link_urb_to_epxhci_dbg_cmd_ptrsmemsetxhci_unregister_pcitrb_in_tddel_timer_syncusb_hcd_is_primary_hcdnr_cpu_idsprintk_ratelimitusb_amd_quirk_pll_enable__init_waitqueue_headxhci_alloc_stream_infoxhci_queue_intr_txusb_put_hcdxhci_endpoint_initxhci_add_endpoint__list_addjiffiesxhci_mem_initusb_amd_dev_putxhci_haltxhci_set_usb2_hardware_lpmdma_pool_destroy_spin_lock_irqsavexhci_free_device_endpoint_resourcesparam_set_intxhci_resetxhci_debug_trbxhci_get_ep_ctxusb_hcd_giveback_urbhweight32xhci_check_bandwidthxhci_update_hub_devicexhci_stop_endpoint_command_watchdogxhci_stopinit_timer_key__const_udelayxhci_get_slot_statexhci_irqx86_dma_fallback_devxhci_get_slot_ctxxhci_cancel_cmdsg_nextxhci_ring_freexhci_initusb_amd_find_chipset_info_spin_lockusb_hcd_poll_rh_statusdynamic_debug_enabled2xhci_get_endpoint_flagxhci_reset_bandwidthpci_disable_msixxhci_endpoint_resetusb_is_intel_switchable_xhcixhci_queue_address_devicexhci_free_or_cache_endpoint_ringxhci_queue_isoc_tx_prepareusb_disable_xhci_portsmalloc_sizesxhci_print_registersdma_set_maskcpu_online_maskxhci_print_ir_setxhci_quiesceusb_hcd_pci_removexhci_alloc_tt_infousb_remove_hcddel_timerparam_get_intxhci_update_bw_infohandshakeusb_add_hcdxhci_print_trb_offsetsxhci_bus_resumexhci_alloc_streamsxhci_update_devicexhci_find_slot_id_by_portmsleepxhci_del_comp_mod_timerusb_create_shared_hcd__kmallocxhci_ring_expansionpci_bus_read_config_bytexhci_msi_irqusb_root_hub_lost_powerxhci-hcd.ko.debug.rodata.str1.1.rodata.str1.8.rela.data.rheldata.rela.rodata.symtab.strtab.shstrtab.rela__mcount_loc.note.gnu.build-id.rela__bug_table.rela.gnu.linkonce.this_module.rela__verbose.note.module.sig.gnu_debuglink.rela__param.modinfo.rela.smp_locks__versions.rela.parainstructions.rela.altinstructions.bss.altinstr_replacement.rela.text.rela.init.text.rela.exit.textm@$]p X $xhsx0$hLc$BZ9H 4H$ 2?J2' HX$ ,0d' $h#X$h$% `'('`$`'([-x$<l<$*>> $@U (V$V8p $0 0$ =`A`J%MI0es4Q