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1 8 1 @ 0 H 0 P 0 X d1 ` 0 h F p [ x Y Y hX Y hX } | { z z ( y 8 x P Px h w <6>[drm] VGACON disable radeon kernel modesetting.
<6>[drm] radeon kernel modesetting enabled.
<6>[drm] radeon userspace modesetting enabled.
failing to power off - crtc active
%s called without lock held, held %d owner %p %p
Process %d trying to send %d buffers via drmDMA
Process %d trying to get %d buffers (of %d max)
wait for fifo failed status : 0x%08X 0x%08X
wait idle failed status : 0x%08X 0x%08X
ADVANCE_RING(): mismatch: nr: %x write: %x line: %d
programming igp gart %08X %08lX %08X
programming pcie %08X %08lX %08X
Called with no initialization
Starting radeon_do_resume_cp()
radeon_do_resume_cp() complete
called with bogus CP mode (%d)
Cannot initialise DRM on this card
This card requires a new X.org DDX for 3D
PCI GART memory not allocated!
could not find cp ring region!
could not find ring read pointer!
could not find dma buffer region!
could not find GART texture region!
could not find ioremap agp regions!
dev_priv->ring_rptr->handle %p
dev->agp_buffer_map->handle %p
<6>[drm] Setting GART location based on new memory map
<6>[drm] Can't use AGP base @0x%08lx, won't fit
<6>[drm] GART aligned down from 0x%08x to 0x%08x
<6>[drm] Setting GART location based on old memory map
dev_priv->gart_buffers_offset 0x%lx
Setting phys_pci_gart to %p %08lX
Cannot use PCI Express without GART in FB memory
failed to setup GART surface!
<3>radeon_cp: Failed to register firmware
<6>[drm] Loading R100 Microcode
<6>[drm] Loading R200 Microcode
<6>[drm] Loading R300 Microcode
<6>[drm] Loading R400 Microcode
<6>[drm] Loading RS690/RS740 Microcode
<6>[drm] Loading RS600 Microcode
<6>[drm] Loading R500 Microcode
<3>radeon_cp: Failed to load firmware "%s"
<3>radeon_cp: Bogus length %zu in firmware "%s"
<6>[drm] writeback test succeeded in %d usecs
<6>[drm] writeback test failed
<6>[drm] writeback forced off
box: x1=%d y1=%d x2=%d y2=%d
ADVANCE_RING(): mismatch: nr: %x write: %x line: %d
hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d
hwprim 0x%x vfmt 0x%x %d..%d %d verts
%s called without lock held, held %d owner %p %p
process %d using buffer owned by %p
reusing indirect: start=0x%x actual=0x%x
<3>radeon: illegal depth clear request. Buggy mesa detected - please update.
tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd
Invalid final destination offset
Invalid texture offset for unit 0
Invalid texture offset for unit 1
Invalid texture offset for unit 2
pid=%d index=%d start=%d end=%d discard=%d
pid=%d index=%d count=%d discard=%d
Packet size larger than size of data provided
Invalid 3d packet for r100-class chip
Too large payload in 3D_LOAD_VBPNTR (count=%d)
Malformed 3D_LOAD_VBPNTR packet (k=%d i=%d narrays=%d count+1=%d).
Invalid 3d packet for r200-class chip
Invalid indx_buffer reg address %08X
Invalid offset (k=%d i=%d) in 3D_LOAD_VBPNTR packet.
Invalid indx_buffer offset is %08X
Packet size provided larger than data provided
radeon_emit_packet3_clip failed
Invalid R200 cubic texture offset
Invalid R100 cubic texture offset
RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED R200_SE_TCL_UCP_VERT_BLEND_CTL R200_SE_TCL_OUTPUT_VTX_COMP_SEL R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0 called with no initialization
called with invalid crtc 0x%x
called with no initialization
tried to enable vblank on non-existent crtc %u
%s called without lock held, held %d owner %p %p
ADVANCE_RING(): mismatch: nr: %x write: %x line: %d
ADVANCE_RING(): mismatch: nr: %x write: %x line: %d
No such registers in hardware reg=%04x sz=%d
Cannot emit more than 64 values at a time (reg=%04x sz=%d)
Register %04x failed check as flag=%02x
Not a packet3 header (0x%08x)
Expected packet3 of length %d but have only %d bytes left
Too large payload in 3D_LOAD_VBPNTR (count=%d)
Offset failed range check (k=%d i=%d) while processing 3D_LOAD_VBPNTR packet.
Malformed 3D_LOAD_VBPNTR packet (k=%d i=%d narrays=%d count+1=%d).
packet3 INDX_BUFFER without preceding 3D_DRAW_INDX_2 is illegal.
3D_DRAW_INDX_2: packet size %i, expected %i
3D_DRAW_INDX_2: expect subsequent INDX_BUFFER, but stream is too short.
3D_DRAW_INDX_2: expect subsequent INDX_BUFFER.
Invalid indx_buffer reg address %08X
INDX_BUFFER: buffer size %i, expected %i
Unknown packet3 header (0x%08x)
bad packet3 type %i at byte %d
Calling r500 command on r300 card
Offset failed range check (reg=%04x sz=%d)
Invalid bitblt first offset is %08X
Invalid bitblt second offset is %08X
Invalid indx_buffer offset is %08X
ADVANCE_RING(): mismatch: nr: %x write: %x line: %d
called with no initialization
cs ioctl valid only for R6XX & R7XX in legacy mode
unable to allocate vertex buffer for swap buffer
Invalid final destination offset
<6>[drm] wait for fifo failed status : 0x%08X 0x%08X
<6>[drm] wait idle failed status : 0x%08X 0x%08X
Cannot initialise DRM on this card
This card requires a new X.org DDX for 3D
could not find cp ring region!
could not find ring read pointer!
could not find dma buffer region!
could not find GART texture region!
could not find ioremap agp regions!
dev_priv->ring_rptr->handle %p
dev->agp_buffer_map->handle %p
<6>[drm] Setting GART location based on new memory map
<6>[drm] Can't use AGP base @0x%08lx, won't fit
<6>[drm] GART aligned down from 0x%08x to 0x%08x
dev_priv->gart_vm_start 0x%08x
dev_priv->gart_buffers_offset 0x%08lx
Need gart offset from userspace
Setting phys_pci_gart to %p %08lX
<3>r600_cp: Failed to register firmware
drivers/gpu/drm/radeon/r600_cp.c <6>[drm] Loading %s CP Microcode
<3>r600_cp: Bogus length %zu in firmware "%s"
<3>r600_cp: Failed to load firmware "%s"
<6>[drm] writeback test succeeded in %d usecs
<6>[drm] writeback test failed
<6>[drm] writeback forced off
Unable to allocate vertex buffer for blit
ADVANCE_RING(): mismatch: nr: %x write: %x line: %d
Requesting to copy %d bytes to a drm buffer with %d bytes space
Failed to copy user data (%p) to drm buffer (%p) %dth page.
Failed to allocate drm buffer object to hold %d bytes in %d pages.
Failed to allocate %dth page for drm buffer with %d bytes and %d pages.
Reached maximum number of debugfs components.
Report so we increase RADEON_DEBUGFS_MAX_COMPONENTS.
Saved %d dwords of commands on ring %d.
GPU reset succeeded, trying to resume
radeon_pm_late_init failed, disabling dpm
<6>[drm] radeon: finishing device.
GTT: %lluM 0x%016llX - 0x%016llX
limiting VRAM to PCI aperture size
VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)
<6>[drm] initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X).
vram limit (%d) must be a power of 2
gart size (%d) must be a power of 2
invalid AGP mode %d (valid mode: -1, 0, 1, 2, 4, 8)
VM size (%d) must be a power of 2
VM size (%d) to small, min is 1GB
VM size (%d) too large, max is 1TB
VM page table size (%d) too small
VM page table size (%d) too large
<4>radeon: No suitable DMA available.
<4>radeon: No coherent DMA available.
<6>[drm] register mmio base: 0x%08X
<6>[drm] register mmio size: %u
<6>[drm] doorbell mmio base: 0x%08X
<6>[drm] doorbell mmio size: %u
registering gem debugfs failed (%d).
registering mst debugfs failed (%d).
<6>[drm] radeon: acceleration disabled, skipping move tests
<6>[drm] radeon: acceleration disabled, skipping sync tests
<6>[drm] radeon: acceleration disabled, skipping benchmarks
Unable to find PCI I/O BAR; using MMIO for ATOM IIO
&rdev->mode_info.atom_context->mutex &rdev->mode_info.atom_context->scratch_mutex Failed to DMA MAP the dummy page
<6>[drm] GPU not posted. posting now...
Card not posted and no BIOS - ignoring
include/drm/ttm/ttm_bo_driver.h Invalid callback to write register 0x%04X with 0x%08X
drivers/gpu/drm/radeon/radeon_asic.c Invalid callback to read register 0x%04X
<6>[drm] Forcing AGP to PCIE mode
<6>[drm] Forcing AGP to PCI mode
WANT_HYPERZ: invalid value %d
macrotile mode array is cik+ only!
BACKEND_ENABLED_MASK is si+ only!
crtc %d: dist from vblank start %d
NULL mode info! Returned count may be wrong.
Fatal error during modeset init
Error during ACPI methods call
include/drm/ttm/ttm_bo_driver.h drivers/gpu/drm/radeon/radeon_kms.c Unknown TV standard; defaulting to NTSC
Unsupported ASIC_InternalSS_Info table: %d %d
<6>[drm] Changing default dispclk from %dMhz to 600Mhz
<6>[drm] Internal thermal controller %s fan control
<6>[drm] External GPIO thermal controller %s fan control
<6>[drm] ADT7473 with internal thermal controller %s fan control
<6>[drm] EMC2103 with internal thermal controller %s fan control
<6>[drm] Possible %s thermal controller at 0x%02x %s fan control
<6>[drm] Unknown thermal controller type %d at 0x%02x %s fan control
<6>[drm] Possible %s thermal controller at 0x%02x
AGP aperture too small (%zuM) need at least 32M, disabling AGP
Illegal AGP Mode: %d (valid %s), leaving at %d
<6>[drm] AGP mode requested: %d
Unable to enable AGP (mode = 0x%lx)
GTT: %lluM 0x%08llX - 0x%08llX
include/drm/ttm/ttm_bo_driver.h failed to reserve rbo before unpin
Bypassing hardware LUT due to 10 bit fb scanout.
Wrong screen bpp (%u) or tile split (%u)
Default TV standard: SCART-PAL
Unknown TV standard; defaulting to NTSC
<6>[drm] No TMDS info found in BIOS
External TMDS Table revision: %d
<6>[drm] No valid Ext TMDS info found in BIOS
<6>[drm] Possible %s thermal controller at 0x%02x
<6>[drm] No TV DAC info found in BIOS
Found DFP table, assuming DVI connector
Found CRT table, assuming VGA connector
<6>[drm] Connector Table: %d (generic)
<6>[drm] Connector Table: %d (ibook)
<6>[drm] Connector Table: %d (powerbook external tmds)
<6>[drm] Connector Table: %d (powerbook internal tmds)
<6>[drm] Connector Table: %d (powerbook vga)
<6>[drm] Connector Table: %d (mini external tmds)
<6>[drm] Connector Table: %d (mini internal tmds)
<6>[drm] Connector Table: %d (imac g5 isight)
<6>[drm] Connector Table: %d (emac)
<6>[drm] Connector Table: %d (rn50-power)
<6>[drm] Connector Table: %d (mac x800)
<6>[drm] Connector Table: %d (mac g5 9600)
<6>[drm] Connector Table: %d (SAM440ep embedded board)
<6>[drm] Connector Table: %d (mac g4 silver)
<6>[drm] Connector table: %d (invalid)
<6>[drm] No panel info found in BIOS
<6>[drm] Panel info derived from registers
atom firmware requested %08x %dkb
>> execute %04X (len %d, WS %d, PS %d)
atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X
<6>PCI registers are not implemented.
<6>SYSIO registers are not implemented.
<6>Undefined indirect IO read method %d.
ATOM: fb read beyond scratch region: %d vs. %d
<6>Undefined indirect IO write method %d.
ATOM: fb write beyond scratch region: %d vs. %d
atombios stuck in loop for more than 5secs aborting
UpdateCRTC_DoubleBufferRegisters drivers/gpu/drm/radeon/radeon_fence.c Last signaled fence 0x%016llx
Last emitted 0x%016llx
Last sync to ring %d 0x%016llx
fence debugfs file creation failed
GPU lockup (current fence id 0x%016llx last fence id 0x%016llx on ring %d)
fence failed to get scratch register
fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p
error waiting for ring[%d] to become idle (%ld)
AGP is not enabled for memory type %u
Trying to move memory with ring turned off.
drivers/gpu/drm/radeon/radeon_ttm.c nothing to bind %lu pages for mreg %p back %p!
failed to bind %lu pages at 0x%08X
include/drm/ttm/ttm_bo_driver.h Failed setting up TTM memory accounting subsystem.
Failed setting up TTM BO subsystem.
failed initializing buffer object driver(%d).
Failed initializing VRAM heap.
<6>[drm] radeon: %uM of VRAM memory ready
Failed initializing GTT heap.
<6>[drm] radeon: %uM of GTT memory ready.
<6>[drm] radeon: ttm finalized
stealing surface reg %d from %p
<6>[drm] Detected VRAM RAM=%lluM, BAR=%lluM
<6>[drm] RAM width %dbits %cDR
Userspace still has active objects !
drivers/gpu/drm/radeon/radeon_object.c include/drm/ttm/ttm_bo_driver.h trying to bind memory to uninitialized GART !
drivers/gpu/drm/radeon/radeon_gart.c trying to unbind memory from uninitialized GART !
<6>[drm] GART: num cpu pages %u, num gpu pages %u
/builddir/build/BUILD/kernel-2.6.32-696.20.1.el6/linux-2.6.32-696.20.1.el6.x86_64/arch/x86/include/asm/dma-mapping.h include/drm/ttm/ttm_bo_driver.h Wrote2: 0x%08x 0x%08x 0x%08x (0x%08x)
Wrote: 0x%08x 0x%08x 0x%08x (0x%08x)
include/drm/ttm/ttm_bo_driver.h failed to reserve rbo before unpin
trying to scanout microtiled buffer
<6>[drm] crtc %d is connected to a TV
Mode need scaling but only first crtc can do that.
<6>[drm] radeon legacy LVDS backlight unloaded
Backlight registration failed
<6>[drm] radeon legacy LVDS backlight initialized
S-video TV connection detected
Composite TV connection detected
<6>[drm] not detecting due to %08x
Determined LVDS native mode details from EDID
No LVDS native mode details, disabling RMX
Adding cvt approximation of native panel mode %s
VGA: Failed to assign ddc bus! Check dmesg for i2c errors.
DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.
DVI: Failed to assign ddc bus! Check dmesg for i2c errors.
LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.
Failed to assign router i2c bus! Check dmesg for i2c errors.
DP: Failed to assign ddc bus! Check dmesg for i2c errors.
HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.
%s: HDMI deep color %d bpc unsupported. Using 8 bpc.
%s: HDMI deep color %d bpc unsupported. Using 12 bpc.
%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.
%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.
%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.
%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.
%s: Deep color disabled. Set radeon module param deep_color=1 to enable.
%s: Display bpc=%d, returned bpc=%d
1: conflicting encoders switching off %s
2: conflicting encoders switching off %s
hpd detected without ddc, retrying in 1 second
%s: probed a monitor but no|invalid EDID
%s: detected RS690 floating bus bug, stopping ddc detect
setting active device to %08x from %08x %08x for encoder %d
Scaling not consistent across encoder.
%lld %d, pll dividers - fb: %d.%d ref: %d, post %d
<6>[drm] Radeon Display Connectors
<6>[drm] DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x
<6>[drm] DDC Router 0x%x/0x%x
<6>[drm] Clock/Data Router 0x%x/0x%x
<6>[drm] DDC: no ddc bus - possible BIOS bug - please report to xorg-driver-ati@lists.x.org
%d - %d, pll dividers - fb: %d.%d ref: %d, post %d
radeon_crtc->flip_status = %d != RADEON_FLIP_SUBMITTED(%d)
failed to wait on page flip fence (%d)!
include/drm/ttm/ttm_bo_driver.h failed to unpin buffer after flip
failed to reserve buffer after flip
flip-ioctl() cur_rbo = %p, new_rbo = %p
failed to pin new rbo buffer before flip
failed to get vblank before flip
flip queue: crtc already busy
failed to unpin new rbo in error path
failed to reserve new rbo buffer before flip
failed to reserve new rbo in error path
No GEM object associated to handle 0x%08X, can't create framebuffer
drivers/gpu/drm/radeon/radeon_cursor.c bad cursor width or height %d x %d
Cannot find cursor object %x for crtc %d
include/drm/ttm/ttm_bo_driver.h Failed to pin new cursor BO (%d)
i2c 0x%02x 0x%02x write failed
i2c 0x%02x 0x%02x read failed
<6>[drm] hw_i2c forced on, you may experience display detection problems!
Failed to register bit i2c %s
gpio not supported with hw i2c
<6>[drm] Using generic clock info
include/drm/ttm/ttm_bo_driver.h <3>failed to allocate framebuffer (%d)
failed to create fbcon object %d
failed to initialize framebuffer %d
<6>[drm] fb mappable at 0x%lX
bo[0x%08x] %8ldkB %8ldMB %s pid %8ld
Allocation size %ldMb bigger than %ldMb limit
Failed to allocate GEM object (%ld, %d, %u, %d)
include/drm/ttm/ttm_bo_driver.h <4>Set domain without domain !
<3>Failed to wait for object: %li
offset 0x%lX is in reserved area 0x%X
invalid flags 0x%08X vs 0x%08X
radeon: writing more dwords to the ring than expected!
rptr next(0x%04x): 0x%08x [%5d]
driver's copy of the wptr: 0x%08x [%5d]
last semaphore signal addr : 0x%016llx
last semaphore wait addr : 0x%016llx
ring %d stalled for more than %llumsec
include/drm/ttm/ttm_bo_driver.h Failed to register debugfs file for rings !
<6>[drm] radeon: irq initialized.
Can not parse packet at %d after CS end %d !
Unknown packet type %d at %d !
Packet (%d:%d:%d) end after CS buffer (%d) !
No packet3 for relocation for packet at %d.
Relocs at %d after relocations chunk end %d !
gem object lookup failed 0x%x
RADEON_GEM_DOMAIN_CPU is not valid for command submission
Only RADEON_GEM_DOMAIN_GTT is allowed for userptr BOs
Failed to initialize parser !
Failed to parse relocation %d!
failed to evaluate ATRM got %s
ACPI VFCT table present but broken (too short #1)
ACPI VFCT table present but broken (too short #2)
<6>[drm] ACPI VFCT contains a BIOS for %02x:%02x.%d %04x:%04x, size %d
<6>[drm] ACPI VFCT table is not for this card
BIOS signature incorrect %x %x
<6>[drm] Not an x86 BIOS ROM, not using.
include/drm/ttm/ttm_bo_driver.h <6>[drm] radeon: %s %u bo moves of %u kB from %d to %d in %u ms, throughput: %u Mb/s or %u MB/s
Error while benchmarking BO move.
pitch %d
use_pitch %d
width %d
width_11 %d
height %d
height_11 %d
num levels %d
depth %d
bpp %d
coordinate type %d
width round to power of 2 %d
height round to power of 2 %d
compress format %d
[drm] Buffer too small for PACKET3 INDX_BUFFER (need %u have %lu) !
Requested mode for not defined action
Only 16 vertex buffers are allowed %d
Cannot src blit from microtiled surface
vline wait had illegal wait until segment
vline wait had illegal wait until
Invalid color buffer format (%d) !
<3>Forbidden register 0x%04X in cs at %d
R100 PCI GART already initialized
[drm] No buffer for color buffer %d !
[drm] Buffer too small for color buffer %d (need %lu have %lu) !
[drm] color buffer %d (%u %u %u %u)
[drm] No buffer for z buffer !
[drm] Buffer too small for z buffer (need %lu have %lu) !
[drm] No buffer for AA resolve buffer %d !
[drm] Buffer too small for AA resolve buffer %d (need %lu have %lu) !
[drm] AA resolve buffer %d (%u %u %u %u)
(PW %u) Vertex array %u no buffer bound
(PW %u) Vertex array %u need %lu dwords have %lu dwords
IMMD draw %u dwors but needs %lu dwords
VAP_VF_CNTL.NUM_VERTICES %u, VTX_SIZE %u
[drm] Invalid primitive walk %d for VAP_VF_CNTL
Cube texture offset greater than object size %lu %lu
Invalid texture coordinate type %u for unit %u
Texture of unit %u needs %lu bytes but is %lu
PRIM_WALK must be 3 for IMMD draw
Packet3 opcode %x not supported
radeon: writing more dwords to the ring than expected!
radeon: moving bo (%d) asking for %u dw.
<4>radeon: wait for empty RBBM fifo failed ! Bad things might happen.
Update pending now high. Unlocking vupdate_lock.
<4>Failed to wait GUI idle while programming pipes. Bad things might happen.
<6>[drm] radeon: cp finalized
Wait for CP idle timeout, shutting down CP.
Can't enable IRQ/MSI because no handler is installed
<6>[drm] PCI GART of %uM enabled (table at 0x%016llX).
Failed to register debugfs file for CP !
<6>[drm] Loading R100 Microcode
<6>[drm] Loading R200 Microcode
<6>[drm] Loading R300 Microcode
<6>[drm] Loading R400 Microcode
<6>[drm] Loading RS690/RS740 Microcode
<6>[drm] Loading RS600 Microcode
<6>[drm] Loading R500 Microcode
<3>radeon_cp: Failed to load firmware "%s"
<3>radeon_cp: Bogus length %zu in firmware "%s"
<6>[drm] radeon: ring at 0x%016lX
radeon: cp isn't working (%d).
failed to get scratch reg for rptr save (%d).
radeon: failed to get scratch reg (%d).
radeon: failed to get ib (%d).
radeon: failed to schedule ib (%d).
radeon: fence wait failed (%d).
<6>[drm] ib test succeeded in %u usecs
radeon: ib test failed (scratch(0x%04X)=0x%08X)
radeon: cp failed to get scratch reg (%d).
radeon: cp failed to lock ring (%d).
<6>[drm] ring test succeeded in %d usecs
radeon: ring test failed (scratch(0x%04X)=0x%08X)
<6>[drm] Generation 2 PCI interface, using max accessible memory
<6>[drm] Generation 1 PCI interface in multifunction mode
<6>[drm] Limiting VRAM to one aperture
failed initializing CP fences (%d).
IB initialization failed (%d).
GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)
Failed to create r100_mc debugfs file.
Expecting combios for RS400/RS480 GPU
You may not have enough display bandwidth for current mode
If you have flickering problem, try to lower resolution, refresh rate, or color depth
PRIM_WALK must be 3 for IMMD draw
Packet3 opcode %x not supported
Invalid RB3D_CCTL: Cannot enable CMASK.
Invalid color buffer format (%d)!
Invalid color buffer format (%d) !
Invalid z buffer format (%d) !
<3>Forbidden register 0x%04X in cs at %d (val=%08x)
RV370 PCIE GART already initialized
Failed to register debugfs file for PCIE gart !
No VRAM object for PCIE GART.
<6>[drm] PCIE GART of %uM enabled (table at 0x%016llX).
Failed to create r100_mc debugfs file.
<6>[drm] Failed to wait MC idle before programming MC.
<4>Failed to wait GUI idle while programming pipes. Bad things might happen.
<4>Failed to wait MC idle while programming pipes. Bad things might happen.
<6>[drm] radeon: %d quad pipes, %d Z pipes initialized.
failed initializing CP fences (%d).
IB initialization failed (%d).
Expecting combios for RS400/RS480 GPU
GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)
radeon: writing more dwords to the ring than expected!
radeon: writing more dwords to the ring than expected!
<4>Failed to wait GUI idle while programming pipes. Bad things might happen.
<6>[drm] radeon: %d quad pipes, %d z pipes initialized.
failed initializing CP fences (%d).
IB initialization failed (%d).
GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)
Failed to register debugfs file for RBBM !
Failed to register debugfs file for pipes !
Unable to use IGP GART size %uM
Valid GART size for IGP are 32M,64M,128M,256M,512M,1G,2G
RS400 GART already initialized
drivers/gpu/drm/radeon/rs400.c Failed to register debugfs file for RS400 GART !
rs400: Wait MC idle timeout before updating MC.
<6>[drm] PCIE GART of %uM enabled (table at 0x%016llX).
<4>rs400: Failed to wait MC idle while programming pipes. Bad things might happen. %08x
failed initializing CP fences (%d).
IB initialization failed (%d).
GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)
Expecting combios for RS400/RS480 GPU
AGP_ADDRESS_SPACE_SIZE 0x%08x
MC_GART_ERROR_ADDRESS_HI 0x%08x
Update pending now high. Unlocking vupdate_lock.
Can't enable IRQ/MSI because no handler is installed
drivers/gpu/drm/radeon/rs600.c Wait MC idle timeout before updating MC.
No VRAM object for PCIE GART.
<6>[drm] PCIE GART of %uM enabled (table at 0x%016llX).
failed initializing CP fences (%d).
IB initialization failed (%d).
Expecting atombios for RS600 GPU
GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)
Failed to register debugfs file for RBBM !
RS600 GART already initialized
Wait MC idle timeout before updating MC.
<4>Failed to wait MC idle while programming pipes. Bad things might happen.
failed initializing CP fences (%d).
IB initialization failed (%d).
GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)
No integrated system info for your GPU, using safe default
Expecting atombios for RV515 GPU
<6>[drm] Direct mapping: aper base at 0x%llx, replaced by direct mapping base 0x%llx.
Failed to register debugfs file for RBBM !
Failed to register debugfs file for pipes !
radeon: writing more dwords to the ring than expected!
Wait MC idle timeout before updating MC.
<4>Failed to wait GUI idle while resetting GPU. Bad things might happen.
<4>Failed to wait MC idle while programming pipes. Bad things might happen.
failed initializing CP fences (%d).
IB initialization failed (%d).
GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)
Expecting atombios for RV515 GPU
Wait MC idle timeout before updating MC.
<4>Failed to wait MC idle while programming pipes. Bad things might happen.
failed initializing CP fences (%d).
IB initialization failed (%d).
GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)
Expecting atombios for RV515 GPU
<6>[drm] GPU not posted. posting now...
invalid pcie lane request: %d
Requested mode for not defined action
<6>[drm] Loading %s Microcode
<3>r600_cp: Bogus length %zu in firmware "%s"
<3>r600_rlc: Bogus length %zu in firmware "%s"
<3>smc: error loading firmware "%s"
<3>smc: Bogus length %zu in firmware "%s"
<3>r600_cp: Failed to load firmware "%s"
R600 PCIE GART already initialized
radeon: failed to create ih ring buffer (%d).
include/drm/ttm/ttm_bo_driver.h radeon: failed to pin ih ring buffer (%d).
radeon: failed to map ih ring buffer (%d).
<6>[drm] PCIE gen 2 link speeds already enabled
<6>[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0
failed to get scratch reg for rptr save (%d).
radeon: writing more dwords to the ring than expected!
R_008010_GRBM_STATUS = 0x%08X
R_008014_GRBM_STATUS2 = 0x%08X
R_000E50_SRBM_STATUS = 0x%08X
R_008674_CP_STALLED_STAT1 = 0x%08X
R_008678_CP_STALLED_STAT2 = 0x%08X
R_00867C_CP_BUSY_STAT = 0x%08X
R_008680_CP_STAT = 0x%08X
R_00D034_DMA_STATUS_REG = 0x%08X
R_000E50_SRBM_STATUS : 0x%08X
radeon: cp failed to lock ring (%d).
radeon: cp failed to get scratch reg (%d).
radeon: cp failed to lock ring %d (%d).
<6>[drm] ring test on %d succeeded in %d usecs
radeon: ring %d test failed (scratch(0x%04X)=0x%08X)
radeon: failed to get scratch reg (%d).
radeon: failed to get ib (%d).
radeon: failed to schedule ib (%d).
radeon: fence wait failed (%d).
<6>[drm] ib test on ring %d succeeded in %u usecs
radeon: ib test failed (scratch(0x%04X)=0x%08X)
IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)
<4>[drm] r600 flush TLB failed
No VRAM object for PCIE GART.
<6>[drm] PCIE GART of %uM enabled (table at 0x%016llX).
Can't enable IRQ/MSI because no handler is installed
failed initializing CP fences (%d).
failed initializing UVD fences (%d).
radeon: failed initializing UVD (%d).
IB initialization failed (%d).
r600 startup failed on resume
r600_irq_process start: rptr %d, wptr %d
IH: D1 vblank - IH event w/o asserted irq bit?
IH: D1 vline - IH event w/o asserted irq bit?
IH: D2 vblank - IH event w/o asserted irq bit?
IH: D2 vline - IH event w/o asserted irq bit?
IH: HPD1 - IH event w/o asserted irq bit?
IH: HPD2 - IH event w/o asserted irq bit?
IH: HPD3 - IH event w/o asserted irq bit?
IH: HPD4 - IH event w/o asserted irq bit?
IH: HPD5 - IH event w/o asserted irq bit?
IH: HPD6 - IH event w/o asserted irq bit?
IH: HDMI0 - IH event w/o asserted irq bit?
IH: HDMI1 - IH event w/o asserted irq bit?
Failed to register debugfs file for mc !
Expecting atombios for R600 GPU
Card not posted and no BIOS - ignoring
<6>[drm] GPU not posted. posting now...
VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used)
<6>[drm] Direct mapping: aper base at 0x%llx, replaced by direct mapping base 0x%llx.
R_008020_GRBM_SOFT_RESET=0x%08X
VRAM: %lluM 0x%08llX - 0x%08llX (%lluM used)
Update pending now high. Unlocking vupdate_lock.
<6>[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0
No VRAM object for PCIE GART.
<6>[drm] PCIE GART of %uM enabled (table at 0x%016llX).
failed initializing CP fences (%d).
failed initializing DMA fences (%d).
radeon: failed initializing UVD (%d).
IB initialization failed (%d).
r600 startup failed on resume
Expecting atombios for R600 GPU
Card not posted and no BIOS - ignoring
<6>[drm] GPU not posted. posting now...
Failed to get dummy create msg
Failed to get dummy destroy msg
Fence A signaled without waiting for semaphore.
Fence B signaled without waiting for semaphore.
Neither fence A nor B has been signaled
Both fence A and B has been signaled
<6>[drm] Fence %c was first signaled
Failed to wait for sync fence A
Failed to wait for sync fence B
<4>Error while testing ring sync (%d).
Fence 1 signaled without waiting for semaphore.
Failed to wait for sync fence 1
Fence 2 signaled without waiting for semaphore.
<6>[drm] Testing syncing between rings %d and %d...
<6>[drm] Testing syncing between rings %d, %d and %d...
Failed to allocate %d pointers
include/drm/ttm/ttm_bo_driver.h Failed to create GTT object %d
Failed to wait for GTT->VRAM fence %d
Failed to map VRAM object after copy %d
Incorrect GTT->VRAM copy %d: Got 0x%p, expected 0x%p (GTT/VRAM offset 0x%16llx/0x%16llx)
Failed to wait for VRAM->GTT fence %d
Failed to map GTT object after copy %d
Incorrect VRAM->GTT copy %d: Got 0x%p, expected 0x%p (VRAM/GTT offset 0x%16llx/0x%16llx)
<6>[drm] Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx
<4>Error while testing BO move.
Invalid color buffer format (%d) !
No support for depth xy offset in kms
<3>Forbidden register 0x%04X in cs at %d
radeon: writing more dwords to the ring than expected!
compute_restarts: def = %u h = %d v = %d, p1 = %04x, p2 = %04x, restart = %d
compute_restart: F/H/V=%u,%u,%u
compute_restart: h_size = %d h_inc = %d
Relocs at %d after relocations chunk end %d !
Can not parse packet at %d after CS end %d !
DMA write buffer too small (%llu %lu)
DMA copy src buffer too small (%llu %lu)
DMA write dst buffer too small (%llu %lu)
DMA constant fill buffer too small (%llu %lu)
Unknown packet type %d at %d !
streamout %d bo too small: 0x%llx, 0x%lx
%s:%d mask 0x%08X | 0x%08X no cb for %d
%s:%d cb invalid format %d for %d (0x%08X)
%s invalid tiling %d for %d (0x%08X)
%s:%d cb pitch (%d, 0x%x, %d) invalid
%s:%d cb height (%d, 0x%x, %d) invalid
%s offset[%d] 0x%llx 0x%llx, %d not aligned
%s offset[%d] %d %llu %d %lu too big (%d %d) (%d %d %d)
%s FMASK_TILE_MAX too large (tile_max=%u, bytes=%u, offset=%llu, bo_size=%lu)
%s CMASK_BLOCK_MAX too large (block_max=%u, bytes=%u, offset=%llu, bo_size=%lu)
z/stencil with no depth buffer
z/stencil with invalid format %d
z/stencil buffer size not set
z/stencil buffer too small (0x%08X %d %d %ld)
%s invalid tiling %d (0x%08X)
%s:%d db pitch (%d, 0x%x, %d) invalid
%s:%d db height (%d, 0x%x, %d) invalid
%s offset 0x%llx, 0x%llx, %d not aligned
z/stencil buffer (%d) too small (0x%08X %d %d %d -> %u have %lu)
%s:%d htile enabled without htile surface 0x%08x
%s:%d htile can't be enabled with bogus db_depth_size 0x%08x
%s:%d htile surface too small %ld for %ld (%d %d)
forbidden register 0x%08x at %d
missing reloc for CP_COHER_BASE 0x%04X
Broken old userspace ? no cb_color0_base supplied before trying to write 0x%08X
vline wait missing WAIT_REG_MEM segment
vline WAIT_REG_MEM waiting on MEM instead of REG
vline WAIT_REG_MEM waiting on PFP instead of ME
vline WAIT_REG_MEM function not equal
vline WAIT_REG_MEM bad bit mask
<3>Forbidden register 0x%04X in cs at %d
bad SET PREDICATION operation %d
CP DMA SAIC only supported for registers
CP DMA src buffer too small (%llu %lu)
CP DMA DAIC only supported for registers
CP DMA dst buffer too small (%llu %lu)
%s:%d texture invalid format %d
%s:%d tex array mode (%d) invalid
%s:%d tex pitch (%d, 0x%x, %d) invalid
%s:%d tex base offset (0x%llx, 0x%llx, %d) invalid
%s:%d tex mip offset (0x%llx, 0x%llx, %d) invalid
texture blevel %d > llevel %d
texture bo too small ((%d %d) (%d %d) %d %d %d -> %d have %ld)
vbo resource seems too big (%d) for the bo (%ld)
STRMOUT_BASE_UPDATE only supported on 7xx
bad STRMOUT_BASE_UPDATE packet count
bad STRMOUT_BASE_UPDATE index
bad STRMOUT_BASE_UPDATE reloc
bad STRMOUT_BASE_UPDATE, bo does not match
bad STRMOUT_BASE_UPDATE, bo offset does not match: 0x%llx, 0x%x
bad STRMOUT_BASE_UPDATE bo too small: 0x%llx, 0x%lx
bad STRMOUT_BUFFER_UPDATE (invalid count)
bad STRMOUT_BUFFER_UPDATE (missing dst reloc)
bad STRMOUT_BUFFER_UPDATE dst bo too small: 0x%llx, 0x%lx
bad STRMOUT_BUFFER_UPDATE (missing src reloc)
bad STRMOUT_BUFFER_UPDATE src bo too small: 0x%llx, 0x%lx
bad MEM_WRITE (invalid count)
bad MEM_WRITE (missing reloc)
bad MEM_WRITE (address not qwords aligned)
bad MEM_WRITE bo too small: 0x%llx, 0x%lx
bad COPY_DW (missing src reloc)
bad COPY_DW src bo too small: 0x%llx, 0x%lx
bad COPY_DW (missing dst reloc)
bad COPY_DW dst bo too small: 0x%llx, 0x%lx
Packet3 opcode %x not supported
Failed to initialize parser !
not in vbl for pm change %08x at %s
radeon: dynamic power management deactivated
radeon: dynamic power management activated
failed to create device file for dpm state
failed to create device file for power profile
failed to create device file for power method
radeon_pm_late_init failed, disabling dpm
Unable to register hwmon device: %d
Unable to create hwmon sysfs file: %d
Debugfs support not implemented for this asic
default engine clock: %u0 kHz
current engine clock: %u0 kHz
default memory clock: %u0 kHz
current memory clock: %u0 kHz
Failed to register debugfs file for dpm!
<6>[drm] radeon: dpm initialized
radeon: dpm initialization failed
Failed to register debugfs file for PM!
<6>[drm] radeon: power management initialized
power_dpm_force_performance_level requested signal parameters: lane %d voltage %s pre_emph %s
using signal parameters: voltage %s pre_emph %s
displayport link status failed
clock recovery reached max voltage
clock recovery at voltage %d pre-emphasis %d
channel eq at voltage %d pre-emphasis %d
drm_dp_aux_register() failed with error %d
drivers/gpu/drm/radeon/atombios_dp.c Unknown bits per sample 0x%x, using 16
Invalid encoder for HDMI: 0x%X
%sabling HDMI interface @ 0x%04X for encoder 0x%x
%s with %d channels, %d Hz sampling rate, %d bits per sample,
0x%02X IEC60958 status bits and 0x%02X category code
failed to setup audio infoframe
failed to pack audio infoframe
<6>[drm] PCIE gen 2 link speeds already enabled
<6>[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0
radeon: writing more dwords to the ring than expected!
include/drm/ttm/ttm_bo_driver.h (%d) reserve RLC sr bo failed
(%d) reserve RLC cp table bo failed
(%d) create RLC cp table bo failed
(%d) pin RLC cp_table bo failed
(%d) map RLC cp table bo failed
GRBM_STATUS = 0x%08X
GRBM_STATUS_SE0 = 0x%08X
GRBM_STATUS_SE1 = 0x%08X
SRBM_STATUS = 0x%08X
SRBM_STATUS2 = 0x%08X
R_008674_CP_STALLED_STAT1 = 0x%08X
R_008678_CP_STALLED_STAT2 = 0x%08X
R_00867C_CP_BUSY_STAT = 0x%08X
R_008680_CP_STAT = 0x%08X
R_00D034_DMA_STATUS_REG = 0x%08X
R_00D834_DMA_STATUS_REG = 0x%08X
<4>[drm] r600 flush TLB failed
No VRAM object for PCIE GART.
<6>[drm] PCIE GART of %uM enabled (table at 0x%016llX).
radeon: cp failed to lock ring (%d).
IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)
Can't enable IRQ/MSI because no handler is installed
drivers/gpu/drm/radeon/evergreen.c evergreen_irq_set: sw int gfx
evergreen_irq_set: sw int cp1
evergreen_irq_set: sw int cp2
failed initializing CP fences (%d).
failed initializing DMA fences (%d).
radeon: error initializing UVD (%d).
IB initialization failed (%d).
Expecting atombios for evergreen GPU
Card not posted and no BIOS - ignoring
<6>[drm] GPU not posted. posting now...
radeon: MC ucode required for NI+.
evergreen startup failed on resume
evergreen_irq_process start: rptr %d, wptr %d
IH: D1 vblank - IH event w/o asserted irq bit?
IH: D1 vline - IH event w/o asserted irq bit?
IH: D2 vblank - IH event w/o asserted irq bit?
IH: D2 vline - IH event w/o asserted irq bit?
IH: D3 vblank - IH event w/o asserted irq bit?
IH: D3 vline - IH event w/o asserted irq bit?
IH: D4 vblank - IH event w/o asserted irq bit?
IH: D4 vline - IH event w/o asserted irq bit?
IH: D5 vblank - IH event w/o asserted irq bit?
IH: D5 vline - IH event w/o asserted irq bit?
IH: D6 vblank - IH event w/o asserted irq bit?
IH: D6 vline - IH event w/o asserted irq bit?
IH: IH event w/o asserted irq bit?
GPU fault detected: %d 0x%08x
VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X
VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X
bad DMA_PACKET_WRITE [%6d] 0x%08x sub cmd is not 0 or 8
bad DMA_PACKET_COPY [%6d] 0x%08x invalid sub cmd
Unknown packet type %d at %d !
CP DMA command requires dw count alignment
Can not parse packet at %d after CS end %d !
DMA write buffer too small (%llu %lu)
DMA L2L, dw src buffer too small (%llu %lu)
DMA L2L, dw dst buffer too small (%llu %lu)
DMA L2T, src buffer too small (%llu %lu)
DMA L2T, dst buffer too small (%llu %lu)
DMA L2L, byte src buffer too small (%llu %lu)
DMA L2L, byte dst buffer too small (%llu %lu)
bad L2L, dw, broadcast DMA_PACKET_COPY
DMA L2L, dw, broadcast src buffer too small (%llu %lu)
DMA L2L, dw, broadcast dst buffer too small (%llu %lu)
DMA L2L, dw, broadcast dst2 buffer too small (%llu %lu)
bad L2T, frame to fields DMA_PACKET_COPY
DMA L2T, frame to fields src buffer too small (%llu %lu)
DMA L2T, frame to fields buffer too small (%llu %lu)
L2T, T2L Partial is cayman only !
bad L2T, broadcast DMA_PACKET_COPY
DMA L2T, broadcast src buffer too small (%llu %lu)
DMA L2T, broadcast dst buffer too small (%llu %lu)
DMA L2T, broadcast dst2 buffer too small (%llu %lu)
DMA L2T, T2L src buffer too small (%llu %lu)
DMA L2T, T2L dst buffer too small (%llu %lu)
DMA constant fill buffer too small (%llu %lu)
%s:%d %s invalid array mode %d
%s:%d %s invalid number of banks %d
%s:%d %s invalid macro tile aspect %d
%s:%d %s invalid tile split %d
%s:%d htile enabled without htile surface 0x%08x
%s:%d htile surface too small %ld for %ld (%d %d)
missing reloc for CP_COHER_BASE 0x%04X
forbidden register 0x%08x at %d
%s:%d %s pitch %d invalid must be aligned with %d
%s:%d %s pitch %d invalid must be aligned with %d (%d %d %d)
%s:%d %s height %d invalid must be aligned with 8
%s:%d %s height %d invalid must be aligned with %d
streamout %d bo too small: 0x%llx, 0x%lx
%s:%d mask 0x%08X | 0x%08X no cb for %d
%s:%d cb invalid format %d for %d (0x%08x)
%s:%d cb[%d] invalid (0x%08x 0x%08x 0x%08x 0x%08x)
%s:%d cb[%d] bo base %ld not aligned with %ld
%s:%d cb[%d] bo too small (layer size %d, offset %d, max layer %d, bo size %ld, slice %d)
%s:%d problematic surf: (%d %d) (%d %d %d %d %d %d %d)
%s:%d stencil invalid format %d
%s:%d stencil invalid (0x%08x 0x%08x 0x%08x 0x%08x)
%s:%d stencil read bo base %ld not aligned with %ld
%s:%d stencil read bo too small (layer size %d, offset %ld, max layer %d, bo size %ld)
%s:%d stencil write bo base %ld not aligned with %ld
%s:%d stencil write bo too small (layer size %d, offset %ld, max layer %d, bo size %ld)
%s:%d depth invalid format %d
%s:%d depth invalid (0x%08x 0x%08x 0x%08x)
%s:%d depth read bo too small (layer size %d, offset %ld, max layer %d, bo size %ld)
%s:%d depth write bo too small (layer size %d, offset %ld, max layer %d, bo size %ld)
bad SET PREDICATION operation %d
bad INDEX_TYPE/NUM_INSTANCES/CLEAR_STATE
DRAW_INDIRECT buffer too small %u + %llu > %lu
CP DMA SAIC only supported for registers
CP DMA src buffer too small (%llu %lu)
CP DMA DAIC only supported for registers
CP DMA dst buffer too small (%llu %lu)
%s:%d texture invalid format %d
%s:%d texture invalid 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x
%s:%d texture bo base %ld not aligned with %ld
%s:%d mipmap bo base %ld not aligned with %ld
%s:%d texture bo too small (layer size %d, offset %ld, max layer %d, depth %d, bo size %ld) (%d %d)
%s:%i got NULL MIP_ADDRESS relocation
%s:%d mipmap [%d] bo too small (layer size %d, offset %ld, coffset %ld, max layer %d, depth %d, bo size %ld) level0 (%d %d %d)
vbo resource seems too big for the bo
bad STRMOUT_BUFFER_UPDATE (invalid count)
bad STRMOUT_BUFFER_UPDATE (missing dst reloc)
bad STRMOUT_BUFFER_UPDATE dst bo too small: 0x%llx, 0x%lx
bad STRMOUT_BUFFER_UPDATE (missing src reloc)
bad STRMOUT_BUFFER_UPDATE src bo too small: 0x%llx, 0x%lx
bad MEM_WRITE (invalid count)
bad MEM_WRITE (missing reloc)
bad MEM_WRITE (address not qwords aligned)
bad MEM_WRITE bo too small: 0x%llx, 0x%lx
bad COPY_DW (missing src reloc)
bad COPY_DW src bo too small: 0x%llx, 0x%lx
bad COPY_DW (missing dst reloc)
bad COPY_DW dst bo too small: 0x%llx, 0x%lx
Packet3 opcode %x not supported
<3>Forbidden register 0x%04X in cs at %d
%s: Disabling hdmi deep color for %d bpc.
%s: Enabling hdmi deep color 30 for 10 bpc.
%s: Enabling hdmi deep color 36 for 12 bpc.
%sabling HDMI interface @ 0x%04X for encoder 0x%x
drivers/gpu/drm/radeon/./radeon_trace.h soffs=%010llx, eoffs=%010llx, flags=%08x
pe=%010Lx, addr=%010Lx, incr=%u, flags=%08x, count=%u
pd_addr=%010Lx, ring=%u, id=%u
ring=%u, waiters=%d, addr=%010Lx
VM fault (0x%02x, vmid %d) at page %u, %s from %s (%d)
<6>[drm] Loading %s Microcode
<3>ni_cp: Bogus length %zu in firmware "%s"
<3>ni_rlc: Bogus length %zu in firmware "%s"
<3>ni_mc: Bogus length %zu in firmware "%s"
<3>smc: error loading firmware "%s"
<3>ni_cp: Failed to load firmware "%s"
radeon: writing more dwords to the ring than expected!
radeon: cp failed to lock ring (%d).
No VRAM object for PCIE GART.
<6>[drm] PCIE GART of %uM enabled (table at 0x%016llX).
failed initializing CP fences (%d).
failed initializing DMA fences (%d).
radeon: failed initializing UVD (%d).
radeon: failed initializing VCE (%d).
IB initialization failed (%d).
vm manager initialization failed (%d).
cayman startup failed on resume
Expecting atombios for cayman GPU
Card not posted and no BIOS - ignoring
<6>[drm] GPU not posted. posting now...
radeon: MC ucode required for NI+.
VM_CONTEXT0_PROTECTION_FAULT_ADDR 0x%08X
VM_CONTEXT0_PROTECTION_FAULT_STATUS 0x%08X
VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X
VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X
LVDS required digital encoder 2 but it was in use - stealing
Got encoder index incorrect - returning 0
<6>[drm] radeon atom LVDS backlight unloaded
Unknown table version: %d, %d
Backlight registration failed
<6>[drm] radeon atom DIG backlight initialized
encoder dpms %d to mode %d, devices %08x, active_devices %08x
semaphore %p has more waiters than signalers, hardware lockup imminent!
[0x%010llx 0x%010llx] size %8lld protected by 0x%016llx on ring %d drivers/gpu/drm/radeon/radeon_sa.c sa_manager is not empty, clearing anyway
(%d) failed to allocate bo for manager
include/drm/ttm/ttm_bo_driver.h (%d) failed to pin manager bo
(%d) failed to reserve manager bo
hw i2c: tried to write too many bytes (%d vs 3)
Invalid Compute packet3: 0x%x
radeon: writing more dwords to the ring than expected!
No VRAM object for PCIE GART.
<6>[drm] PCIE GART of %uM enabled (table at 0x%016llX).
IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)
si_irq_process start: rptr %d, wptr %d
IH: IH event w/o asserted irq bit?
GPU fault detected: %d 0x%08x
VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X
VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X
VM fault (0x%02x, vmid %d) at page %u, %s from %s (%d)
Can't enable IRQ/MSI because no handler is installed
<6>[drm] PCIE gen 3 link speeds already enabled
<6>[drm] enabling PCIE gen 3 link speeds, disable with radeon.pcie_gen2=0
<6>[drm] PCIE gen 2 link speeds already enabled
<6>[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0
failed initializing CP fences (%d).
failed initializing DMA fences (%d).
radeon: cp failed to lock ring (%d).
radeon: failed initializing UVD (%d).
radeon: failed initializing VCE (%d).
IB initialization failed (%d).
vm manager initialization failed (%d).
Expecting atombios for cayman GPU
Card not posted and no BIOS - ignoring
<6>[drm] GPU not posted. posting now...
<6>[drm] Probable bad vram size: 0x%08x
<6>[drm] Loading %s Microcode
<3>si_cp: Bogus length %zu in firmware "%s"
<3>si_cp: validation failed for firmware "%s"
<3>si_rlc: Bogus length %zu in firmware "%s"
<3>si_mc: Bogus length %zu in firmware "%s"
<3>smc: error loading firmware "%s"
<3>si_smc: Bogus length %zu in firmware "%s"
<3>si_fw: mixing new and old firmware!
<3>si_cp: Failed to load firmware "%s"
radeon: MC ucode required for NI+.
include/drm/ttm/ttm_bo_driver.h writing beyond doorbell aperture: 0x%08x!
reading beyond doorbell aperture: 0x%08x!
<6>[drm] Loading %s Microcode
<3>cik_cp: Bogus length %zu in firmware "%s"
<3>cik_fw: validation failed for firmware "%s"
<3>cik_rlc: Bogus length %zu in firmware "%s"
<3>cik_sdma: Bogus length %zu in firmware "%s"
<3>cik_mc: Bogus length %zu in firmware "%s"
<3>smc: error loading firmware "%s"
<3>cik_smc: Bogus length %zu in firmware "%s"
<3>ci_fw: mixing new and old firmware!
<3>cik_cp: Failed to load firmware "%s"
include/drm/ttm/ttm_bo_driver.h (%d) reserve HPD EOP bo failed
radeon: writing more dwords to the ring than expected!
SDMA0_STATUS_REG = 0x%08X
SDMA1_STATUS_REG = 0x%08X
CP_CPF_STALLED_STAT1 = 0x%08x
CP_CPC_STALLED_STAT1 = 0x%08x
No VRAM object for PCIE GART.
<6>[drm] PCIE GART of %uM enabled (table at 0x%016llX).
unknown num pipe config: 0x%x
radeon: failed to get scratch reg (%d).
radeon: failed to get ib (%d).
radeon: failed to schedule ib (%d).
radeon: fence wait failed (%d).
<6>[drm] ib test on ring %d succeeded in %u usecs
radeon: ib test failed (scratch(0x%04X)=0x%08X)
radeon: cp failed to get scratch reg (%d).
radeon: cp failed to lock ring %d (%d).
<6>[drm] ring test on %d succeeded in %d usecs
radeon: ring %d test failed (scratch(0x%04X)=0x%08X)
Can't enable IRQ/MSI because no handler is installed
si_irq_set: sw int cp1 invalid pipe %d
si_irq_set: sw int cp1 invalid me %d
si_irq_set: sw int cp2 invalid pipe %d
si_irq_set: sw int cp2 invalid me %d
IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)
cik_irq_process start: rptr %d, wptr %d
IH: IH event w/o asserted irq bit?
GPU fault detected: %d 0x%08x
VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X
VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X
VM fault (0x%02x, vmid %d) at page %u, %s from '%s' (0x%08x) (%d)
Illegal register access in command stream
Illegal instruction in command stream
Illegal instruction in SDMA command stream
radeon: cp failed to lock ring (%d).
<6>[drm] PCIE gen 3 link speeds already enabled
<6>[drm] enabling PCIE gen 3 link speeds, disable with radeon.pcie_gen2=0
<6>[drm] PCIE gen 2 link speeds already enabled
<6>[drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0
(%d) create HDP EOP bo failed
failed initializing CP fences (%d).
failed initializing DMA fences (%d).
radeon: failed initializing UVD (%d).
radeon: failed initializing VCE (%d).
IB initialization failed (%d).
vm manager initialization failed (%d).
Expecting atombios for cayman GPU
Card not posted and no BIOS - ignoring
<6>[drm] GPU not posted. posting now...
radeon: MC ucode required for NI+.
power level 0 sclk: %u vddc_index: %d
power level 1 sclk: %u vddc_index: %d
No integrated system info for your GPU
power level 0 sclk: %u vddc_index: %d
power level 1 sclk: %u vddc_index: %d
power level 0 sclk: %u mclk: %u vddc: %u
power level 1 sclk: %u mclk: %u vddc: %u
power level 2 sclk: %u mclk: %u vddc: %u
power level %d sclk: %u mclk: %u vddc: %u
power level 0 sclk: %u mclk: %u vddc: %u vddci: %u
power level 1 sclk: %u mclk: %u vddc: %u vddci: %u
power level 2 sclk: %u mclk: %u vddc: %u vddci: %u
power level 0 sclk: %u mclk: %u vddc: %u
power level 1 sclk: %u mclk: %u vddc: %u
power level 2 sclk: %u mclk: %u vddc: %u
rv770_restrict_performance_levels_before_switch failed
power level %d sclk: %u mclk: %u vddc: %u vddci: %u
power level %d sclk: %u mclk: %u vddc: %u
Could not enable thermal interrupts.
rv770_construct_vddc_table failed
Target MCLK greater than largest MCLK in DLL speed table
Invalid encoded Reference Divider
unknown asic in smc ucode loader
drivers/gpu/drm/radeon/rv770_smc.c rv770_restrict_performance_levels_before_switch failed
cypress_upload_sw_state failed
cypress_upload_mc_reg_table failed
cypress_construct_voltage_tables failed
cypress_get_mvdd_configuration failed
cypress_get_table_locations failed
cypress_init_smc_table failed
cypress_populate_mc_reg_table failed
cypress_notify_smc_display_change failed
power level %d sclk: %u mclk: %u vddc: %u vddci: %u
rv770_restrict_performance_levels_before_switch failed
cypress_upload_sw_state failed
cypress_upload_mc_reg_table failed
btc_set_power_state_conditionally_enable_ulv failed
cypress_construct_voltage_tables failed
cypress_get_mvdd_configuration failed
cypress_get_table_locations failed
cypress_populate_mc_reg_table failed
cypress_notify_smc_display_change failed
power level %d sclk: %u vddc: %u
power level %d sclk: %u vddc: %u
The htcTmpLmt should be larger than htcHystLmt.
<6>[drm] Found smc ucode version: 0x%08x
power level %d sclk: %u vddc: %u
The htcTmpLmt should be larger than htcHystLmt.
power level %d sclk: %u vddc: %u
SMC failed to handle the message!
power level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u
power level %d sclk: %u mclk: %u vddc: %u vddci: %u
power level %d sclk: %u mclk: %u vddc: %u vddci: %u
cypress_construct_voltage_tables failed
ni_process_firmware_header failed
ni_initial_switch_from_arb_f0_to_f1 failed
ni_init_smc_spll_table failed
ni_init_arb_table_index failed
ni_populate_mc_reg_table failed
ni_initialize_smc_cac_tables failed
ni_initialize_hardware_cac_manager failed
ni_populate_smc_tdp_limits failed
cypress_notify_smc_display_change failed
ni_restrict_performance_levels_before_switch failed
ni_enable_power_containment failed
ni_upload_mc_reg_table failed
ni_program_memory_timing_parameters failed
ni_power_control_set_level failed
unknown asic in smc ucode loader
drivers/gpu/drm/radeon/si_smc.c power level %d sclk: %u mclk: %u vddc: %u vddci: %u pcie gen: %u
Unknown SI asic revision, failed to initialize PowerTune!
Invalid PL2! DTE will not be updated.
Could not enable thermal interrupts.
Failed to load fan table to the SMC. si_construct_voltage_tables failed
si_process_firmware_header failed
si_initial_switch_from_arb_f0_to_f1 failed
si_init_smc_spll_table failed
si_init_arb_table_index failed
si_populate_mc_reg_table failed
si_initialize_smc_cac_tables failed
si_initialize_smc_dte_tables failed
si_populate_smc_tdp_limits failed
si_populate_smc_tdp_limits_2 failed
si_initialize_hardware_cac_manager failed
si_notify_smc_display_change failed
si_restrict_performance_levels_before_switch failed
si_enable_power_containment failed
si_upload_mc_reg_table failed
si_program_memory_timing_parameters failed
si_power_control_set_level failed
si_set_power_state_conditionally_enable_ulv failed
power level %d sclk: %u vddc: %u
power level %d sclk: %u vddc: %u
The htcTmpLmt should be larger than htcHystLmt.
kv_calculate_ds_divider failed
kv_process_firmware_header failed
kv_upload_dpm_settings failed
kv_populate_samu_table failed
kv_enable_auto_thermal_throttling failed
kv_enable_dpm_voltage_scaling failed
kv_program_bootup_state failed
unknown asic in smc ucode loader
drivers/gpu/drm/radeon/ci_smc.c power level %d sclk: %u mclk: %u pcie gen: %u pcie lanes: %u
Could not enable thermal interrupts.
Could not disable thermal interrupts.
power level avg sclk: %u mclk: %u
ci_generate_dpm_level_enable_mask failed
ci_update_and_upload_mc_reg_table failed
ci_program_memory_timing_parameters failed
ci_upload_dpm_level_enable_mask failed
ci_freeze_sclk_mclk_dpm failed
ci_populate_and_upload_sclk_mclk_dpm_levels failed
ci_unfreeze_sclk_mclk_dpm failed
ci_construct_voltage_tables failed
ci_process_firmware_header failed
ci_initial_switch_from_arb_f0_to_f1 failed
ci_init_arb_table_index failed
ci_populate_initial_mc_reg_table failed
ci_enable_ds_master_switch failed
ci_enable_power_containment failed
ci_enable_thermal_based_sclk_dpm failed
Failed to load fan table to the SMC. ci_notify_smc_display_change failed
ci_power_control_set_level failed
No connected audio pins found!
drivers/gpu/drm/radeon/radeon.h drivers/gpu/drm/radeon/radeon_vm.c bo %p don't has a mapping in vm %p
include/drm/ttm/ttm_bo_driver.h Cannot allocate memory for page table array
va above limit (0x%08X > 0x%08X)
bo %p va 0x%010Lx conflict with (bo %p 0x%010lx 0x%010lx)
Unknown SDMA ucode version: %u.%u
clear_state_descriptor_offset: %u
avail_scratch_ram_locations: %u
master_pkt_description_offset: %u
Unknown RLC ucode version: %u.%u
Unknown GFX ucode version: %u.%u
Unknown SMC ucode version: %u.%u
io_debug_array_offset_bytes: %u
Unknown MC ucode version: %u.%u
radeon: failed testing IB on GFX ring (%d).
radeon: failed testing IB on ring %d (%d).
failed to register debugfs file for SA
failed to emit fence for new IB (%d)
drivers/gpu/drm/radeon/radeon.h Couldn't read Speaker Allocation Data Block: %d
drivers/gpu/drm/radeon/radeon_audio.c failed to setup AVI infoframe: %d
failed to pack AVI infoframe: %d
<4>Calculated ACR N value is too small. You may experience audio problems.
<4>Calculated ACR N value is too large. You may experience audio problems.
Calculated ACR timing N=%d CTS=%d for frequency %d
drivers/gpu/drm/radeon/radeon_dp_auxch.c auxch hw never signalled completion, error %08x
dp_aux_ch flags not zero: %08x
setting active device to %08x from %08x %08x for encoder %d
failed to get ESI - device may have failed %d
timed out waitin for SAT update %d
timed out waiting for FE %d %d
failed to get frontend for dig encoder
timed out wait for rate cntl %d
include/drm/ttm/ttm_bo_driver.h (%ld) failed to wait for user bo
(%ld) failed to validate user bo
radeon: failed to get ib (%d).
radeon: failed to schedule ib (%d).
radeon: fence wait failed (%d).
<6>[drm] ib test on ring %d succeeded in %u usecs
radeon: ib test failed (0x%08X)
radeon: writing more dwords to the ring than expected!
radeon: dma failed to lock ring %d (%d).
<6>[drm] ring test on %d succeeded in %d usecs
radeon: ring %d test failed (0x%08X)
radeon: writing more dwords to the ring than expected!
radeon: writing more dwords to the ring than expected!
radeon: writing more dwords to the ring than expected!
radeon: writing more dwords to the ring than expected!
radeon: failed to get ib (%d).
radeon: failed to schedule ib (%d).
radeon: fence wait failed (%d).
<6>[drm] ib test on ring %d succeeded in %u usecs
radeon: ib test failed (0x%08X)
radeon: writing more dwords to the ring than expected!
radeon: dma failed to lock ring %d (%d).
<6>[drm] ring test on %d succeeded in %d usecs
radeon: ring %d test failed (0x%08X)
UVD IB length (%d) not 16 dwords aligned!
Relocs at %d after relocations chunk end %d !
buffer (%d) to small (%d / %d)!
reloc %LX-%LX crossing 256MB boundary!
msg/fb buffer %LX-%LX out of 256MB segment!
More than one message in a UVD-IB!
UVD messages must be 64 byte aligned!
Failed waiting for UVD message (%d)!
Failed mapping the UVD message (%d)!
UVD codec not supported by hardware %d!
Invalid UVD decoding target pitch!
Invalid dpb_size in UVD message (%d / %d)!
UVD handle collision detected!
Illegal UVD message type (%d)!
Message needed before other commands are send!
radeon_uvd: Can't load firmware "%s"
(%d) failed to allocate UVD bo
include/drm/ttm/ttm_bo_driver.h (%d) failed to reserve UVD bo
radeon: writing more dwords to the ring than expected!
radeon: failed to raise UVD clocks (%d).
radeon: failed to get create msg (%d).
radeon: failed to get destroy ib (%d).
radeon: fence wait failed (%d).
<6>[drm] ib test on ring %d succeeded
radeon: cp failed to lock ring %d (%d).
<6>[drm] ring test on %d succeeded in %d usecs
radeon: ring %d test failed (0x%08X)
UVD not responding, giving up!!!
UVD not responding, trying to reset the VCPU!!!
radeon: ring failed to lock UVD ring (%d).
<6>[drm] UVD initialized successfully.
radeon: writing more dwords to the ring than expected!
radeon: writing more dwords to the ring than expected!
Relocs at %d after relocations chunk end %d !
invalid VCE command length (%d)!
No other command allowed after destroy!
VCE handle collision detected!
no session command at start of IB
New session without create command!
radeon: failed to get ib (%d).
radeon: failed to schedule ib (%d).
radeon: failed to get create msg (%d).
radeon: failed to get destroy ib (%d).
radeon: fence wait failed (%d).
<6>[drm] ib test on ring %d succeeded
Error destroying VCE handle (%d)!
radeon_vce: Can't load firmware "%s"
<6>[drm] Found VCE firmware/feedback version %hhd.%hhd.%hhd / %d!
(%d) failed to allocate VCE bo
include/drm/ttm/ttm_bo_driver.h (%d) failed to reserve VCE bo
radeon: writing more dwords to the ring than expected!
radeon: vce failed to lock ring %d (%d).
<6>[drm] ring test on %d succeeded in %d usecs
drivers/gpu/drm/radeon/vce_v1_0.c VCE not responding, giving up!!!
VCE not responding, trying to reset the ECPU!!!
<6>[drm] VCE initialized successfully.
drivers/gpu/drm/radeon/vce_v2_0.c failed to evaluate ATPX got %s
<6>vga_switcheroo: detected switching method %s handle
ATPX buffer is too small: %zu
ATPX version %u, functions 0x%08x
failed to evaluate ATCS got %s
<6>[drm] ATCS buffer is too small: %zu
failed to evaluate ATIF got %s
event, device_class = %s, type = %#x
ATIF: %d pending SBIOS requests
Call to ATCS verify_interface failed: %d
<6>[drm] ATIF buffer is too small: %zu
Call to ATIF verify_interface failed: %d
Cannot find a backlight controller
SYSTEM_PARAMS: mask = %#x, flags = %#x
Notification %s, command code = %#x
Call to GET_SYSTEM_PARAMS failed: %d
radeondrmfb radeon ATI Radeon 20080528
SAREA setup failed
AGP PCI PCIE %s card detected
done_age = %d
<6>[drm] Num pipes: %d
called before init done
failed to cleanup PCI GART!
radeon_do_cp_idle %d
while CP running
Forcing AGP card to PCI mode
Restoring AGP flag
TIMEOUT problem!
BAD cp_mode (%x)!
could not find sarea!
dev_priv->cp_ring->handle %p
dev_priv->gart_size %d
dev_priv->gart_vm_start 0x%x
failed to init PCI GART!
radeon_cp radeon/R100_cp.bin radeon/R200_cp.bin radeon/R300_cp.bin radeon/R420_cp.bin radeon/RS690_cp.bin radeon/RS600_cp.bin radeon/R520_cp.bin Failed to load firmware!
offset fixed up to 0x%x
color tiling disabled
color tiling enabled
Invalid parameter %d
buf=%d s=0x%x e=0x%x
bad prim %x count %d
buffer prim %d
bad prim %x numverts %d
pid=%d
copy_to_user
idx=%d s=%d e=%d d=%d
buffer index %d (of %d max)
sending pending buffer %d
flags = 0x%x
%d,%d-%d,%d flags 0x%x
%d,%d-%d,%d
pfCurrentPage=%d
null texture image!
invalid texture format %d
tex=%dx%d blit=%d
EAGAIN
EFAULT on pad, %d bytes
Invalid destination offset
dirty=0x%08x
Invalid depth buffer offset
pid=%d index=%d discard=%d
radeon_emit_state2 failed
misaligned buffer 0x%x
no header 0x%x - 0x%x
radeon_emit_state failed
Not a type 3 packet
Invalid first packet offset
Invalid second packet offset
Invalid packet type %x
Invalid rndr_gen_indx offset
RADEON_CMD_PACKET
Invalid colour buffer offset
Invalid R200 texture offset
Invalid R100 texture offset
Unknown state packet ID %d
radeon_emit_packets failed
RADEON_CMD_SCALARS
RADEON_CMD_VECTORS
RADEON_CMD_DMA_DISCARD
bad buffer %p %p %d
RADEON_CMD_PACKET3
Packet verification failed
radeon_emit_packet3 failed
RADEON_CMD_PACKET3_CLIP
RADEON_CMD_SCALARS2
RADEON_CMD_WAIT
%x
radeon_emit_wait failed
RADEON_CMD_VECLINEAR
bad cmd_type %d at byte %d
DONE
radeon_emit_veclinear failed
RADEON_CP_INIT RADEON_CP_START RADEON_CP_STOP RADEON_CP_RESET RADEON_CP_IDLE RADEON_RESET RADEON_FULLSCREEN RADEON_SWAP RADEON_CLEAR RADEON_VERTEX RADEON_INDICES RADEON_STIPPLE RADEON_INDIRECT RADEON_TEXTURE RADEON_VERTEX2 RADEON_CMDBUF RADEON_GETPARAM RADEON_FLIP RADEON_ALLOC RADEON_FREE RADEON_INIT_HEAP RADEON_IRQ_EMIT RADEON_IRQ_WAIT RADEON_CP_RESUME RADEON_SETPARAM RADEON_SURF_ALLOC RADEON_SURF_FREE RADEON_CS RADEON_PP_MISC RADEON_PP_CNTL RADEON_RB3D_COLORPITCH RADEON_RE_LINE_PATTERN RADEON_SE_LINE_WIDTH RADEON_PP_LUM_MATRIX RADEON_PP_ROT_MATRIX_0 RADEON_RB3D_STENCILREFMASK RADEON_SE_VPORT_XSCALE RADEON_SE_CNTL RADEON_SE_CNTL_STATUS RADEON_RE_MISC RADEON_PP_TXFILTER_0 RADEON_PP_BORDER_COLOR_0 RADEON_PP_TXFILTER_1 RADEON_PP_BORDER_COLOR_1 RADEON_PP_TXFILTER_2 RADEON_PP_BORDER_COLOR_2 RADEON_SE_ZBIAS_FACTOR RADEON_SE_TCL_OUTPUT_VTX_FMT R200_PP_TXCBLEND_0 R200_PP_TXCBLEND_1 R200_PP_TXCBLEND_2 R200_PP_TXCBLEND_3 R200_PP_TXCBLEND_4 R200_PP_TXCBLEND_5 R200_PP_TXCBLEND_6 R200_PP_TXCBLEND_7 R200_SE_TCL_LIGHT_MODEL_CTL_0 R200_PP_TFACTOR_0 R200_SE_VTX_FMT_0 R200_SE_VAP_CNTL R200_SE_TCL_MATRIX_SEL_0 R200_SE_TCL_TEX_PROC_CTL_2 R200_PP_TXFILTER_0 R200_PP_TXFILTER_1 R200_PP_TXFILTER_2 R200_PP_TXFILTER_3 R200_PP_TXFILTER_4 R200_PP_TXFILTER_5 R200_PP_TXOFFSET_0 R200_PP_TXOFFSET_1 R200_PP_TXOFFSET_2 R200_PP_TXOFFSET_3 R200_PP_TXOFFSET_4 R200_PP_TXOFFSET_5 R200_SE_VTE_CNTL R200_PP_TAM_DEBUG3 R200_PP_CNTL_X R200_RB3D_DEPTHXY_OFFSET R200_RE_AUX_SCISSOR_CNTL R200_RE_SCISSOR_TL_0 R200_RE_SCISSOR_TL_1 R200_RE_SCISSOR_TL_2 R200_SE_VAP_CNTL_STATUS R200_SE_VTX_STATE_CNTL R200_RE_POINTSIZE R200_PP_CUBIC_FACES_0 R200_PP_CUBIC_OFFSET_F1_0 R200_PP_CUBIC_FACES_1 R200_PP_CUBIC_OFFSET_F1_1 R200_PP_CUBIC_FACES_2 R200_PP_CUBIC_OFFSET_F1_2 R200_PP_CUBIC_FACES_3 R200_PP_CUBIC_OFFSET_F1_3 R200_PP_CUBIC_FACES_4 R200_PP_CUBIC_OFFSET_F1_4 R200_PP_CUBIC_FACES_5 R200_PP_CUBIC_OFFSET_F1_5 RADEON_PP_TEX_SIZE_0 RADEON_PP_TEX_SIZE_1 RADEON_PP_TEX_SIZE_2 R200_RB3D_BLENDCOLOR R200_SE_TCL_POINT_SPRITE_CNTL RADEON_PP_CUBIC_FACES_0 RADEON_PP_CUBIC_OFFSET_T0_0 RADEON_PP_CUBIC_FACES_1 RADEON_PP_CUBIC_OFFSET_T1_0 RADEON_PP_CUBIC_FACES_2 RADEON_PP_CUBIC_OFFSET_T2_0 R200_PP_TRI_PERF R200_PP_AFS_0 R200_PP_AFS_1 R200_ATF_TFACTOR R200_PP_TXCTLALL_0 R200_PP_TXCTLALL_1 R200_PP_TXCTLALL_2 R200_PP_TXCTLALL_3 R200_PP_TXCTLALL_4 R200_PP_TXCTLALL_5 R200_VAP_PVS_CNTL heap already initialized? copy_to_user
Invalid crtc %u
copy_to_user
%i cliprects
copy cliprect faulted
R300_CMD_PACKET0
R300_CMD_VPU
R300_CMD_PACKET3
R300_CMD_PACKET3_CLEAR
r300_emit_clear failed
R300_CMD_PACKET3_RAW
r300_emit_raw_packet3 failed
r300_emit_packet3 failed
R300_CMD_END3D
R300_CMD_CP_DELAY
RADEON_CMD_DMA_DISCARD
buffer index %d (of %d max)
bad buffer %p %p %d
R300_CMD_WAIT
R300_CMD_SCRATCH
r300_scratch failed
R300_CMD_R500FP
r500fp %d %d type: %d
bad cmd_type %i at byte %d
END
r300_emit_packet0 failed
r300_emit_vpu failed
r300_emit_r500fp failed
dwords:%d
offset 0x%lx
ib_get failed
EAGAIN
EFAULT on pad, %d bytes
Invalid destination offset
%d,%d-%d,%d
<6>[drm] Resetting GPU
unable to map PCIGART pages!
page entry %d: 0x%016llx
&dev_priv->cs_mutex Forcing AGP card to PCI mode
Restoring AGP flag
TIMEOUT problem!
BAD cp_mode (%x)!
could not find sarea!
dev_priv->cp_ring->handle %p
fb 0x%08x size %d
dev_priv->gart_size %d
Using gart offset 0x%08lx
ioremap failed.
Failed to init GART table
r600_cp RV730 RV630 RV620 RV635 RV670 RV710 R600 RS780 radeon/%s_pfp.bin radeon/%s_me.bin Failed to load firmware!
RV610 RV770
GPU reset failed
limiting GTT
&rdev->ring_lock &rdev->dc_hw_i2c_mutex &rdev->gem.mutex &rdev->pm.mutex &rdev->gpu_clock_mutex &rdev->srbm_mutex &rdev->grbm_idx_mutex &rdev->pm.mclk_lock &rdev->exclusive_lock &rdev->mn_lock gart size (%d) too small
Unable to find PCI I/O BAR
ib ring test failed (%d).
%p reserve failed
Failed to pin cursor BO (%d)
(%d) create WB bo failed
(%d) pin WB bo failed
(%d) map WB bo failed
dis en WB %sabled
<6>radeon: switched on
<6>radeon: switched off
copy_from_user %s:%u
unknown crtc id %d
tiling config is r6xx+ only!
WANT_CMASK: invalid value %d
timestamp is r6xx+ only!
tile mode array is si+ only!
Invalid request %d
copy_to_user %s:%u
Invalid crtc %d
Query failed! stat %d
Fatal error during GPU init
%p reserve failed
RADEON_CP_INIT RADEON_CP_START RADEON_CP_STOP RADEON_CP_RESET RADEON_CP_IDLE RADEON_RESET RADEON_FULLSCREEN RADEON_SWAP RADEON_CLEAR RADEON_VERTEX RADEON_INDICES RADEON_STIPPLE RADEON_INDIRECT RADEON_TEXTURE RADEON_VERTEX2 RADEON_CMDBUF RADEON_GETPARAM RADEON_FLIP RADEON_ALLOC RADEON_FREE RADEON_INIT_HEAP RADEON_IRQ_EMIT RADEON_IRQ_WAIT RADEON_CP_RESUME RADEON_SETPARAM RADEON_SURF_ALLOC RADEON_SURF_FREE RADEON_GEM_INFO RADEON_GEM_CREATE RADEON_GEM_MMAP RADEON_GEM_PREAD RADEON_GEM_PWRITE RADEON_GEM_SET_DOMAIN RADEON_GEM_WAIT_IDLE RADEON_CS RADEON_INFO RADEON_GEM_SET_TILING RADEON_GEM_GET_TILING RADEON_GEM_BUSY RADEON_GEM_VA RADEON_GEM_OP RADEON_GEM_USERPTR radeon Default TV standard: NTSC
Default TV standard: NTSC-J
Default TV standard: PAL
Default TV standard: PAL-M
Default TV standard: PAL-N
Default TV standard: PAL-CN
Default TV standard: PAL-60
Default TV standard: SECAM
TMDS PLL From ATOMBIOS %u %x
old table version %d, %d
Unknown table version %d, %d
new table version %d, %d
unknown voltage object table
Unsupported IGP table: %d %d
with without Bad LCD record %d
Skipping Component Video
0x%x TV1 connected
TV1 disconnected
CV connected
CV disconnected
LCD1 connected
LCD1 disconnected
CRT1 connected
CRT1 disconnected
CRT2 connected
CRT2 disconnected
DFP1 connected
DFP1 disconnected
DFP2 connected
DFP2 disconnected
DFP3 connected
DFP3 disconnected
DFP4 connected
DFP4 disconnected
DFP5 connected
DFP5 disconnected
DFP6 connected
DFP6 disconnected
NONE lm63 adm1032 adm1030 max6649 f75375 asc7xxx RV6xx RV770 adt7473 External GPIO Evergreen emc2103 Sumo Northern Islands Southern Islands lm96163 Sea Islands Unable to acquire AGP: %d
Unable to get AGP info: %d
1, 2, 4 4, 8 radeon AGP reinit failed
Unknown table version %d %d
unable to allocate a PPLL
%p reserve failed
No FB bound
Unsupported screen format %s
Default TV standard: NTSC
Default TV standard: PAL
Default TV standard: PAL-M
Default TV standard: PAL-60
Default TV standard: NTSC-J
29.498928713 MHz TV ref clk
28.636360000 MHz TV ref clk
14.318180000 MHz TV ref clk
27.000000000 MHz TV ref clk
DFP table revision: %d
TMDS PLL From COMBIOS %u %x
f75375 Unknown connector type: %d
No connector info found
LCD LCD DDC Info Table found!
DVI_DDC VGA_DDC MM_I2C MONID GPIOPAD_MASK CRT2_DDC <6>[drm] Panel ID String: %s
<6>[drm] Panel Size %dx%d
TV1 connected
TV1 disconnected
LCD1 connected
LCD1 disconnected
CRT1 connected
CRT1 disconnected
CRT2 connected
CRT2 disconnected
DFP1 connected
DFP1 disconnected
DFP2 connected
DFP2 disconnected
Unknown id %d
NONE lm63 adm1032 <6>unimplemented!
<6>Unknown IIO opcode.
ATOM BIOS beeped!
<7> block: %d
base: 0x%04X
POST card output: 0x%02X
port: %d (%s)
port: %d
<6>Invalid BIOS magic.
761295520 <6>Invalid ATI magic.
ATOM <6>Invalid ATOM magic.
<6>ATOM BIOS: %s
%s @ 0x%04X
[%d] @ 0x%04X
<<
table: %d (%s)
table: %d
<7>REG[0x%04X] <6>Bad IO mode.
<7>PS[0x%02X,0x%04X] <7>WS[0x%02X] <7>ID[0x%04X+%04X] <7>ID[0x%04X] <7>FB[0x%02X] <7>IMM 0x%08X
<7>IMM 0x%04X
<7>IMM 0x%02X
<7>PLL[0x%02X] <7>MC[0x%02X] <7>.[31:0] -> 0x%08X
<7>.[15:0] -> 0x%04X
<7>.[23:8] -> 0x%04X
<7>.[31:16] -> 0x%04X
<7>.[7:0] -> 0x%02X
<7>.[15:8] -> 0x%02X
<7>.[23:16] -> 0x%02X
<7>.[31:24] -> 0x%02X
src1: src2: NE EQ result: %s
switch: case: target: %04X
<6>Bad case.
LE GT result: %s %s
fb_base: <7>PS[0x%02X] <7>.[31:0] <- 0x%08X
<7>.[15:0] <- 0x%04X
<7>.[23:8] <- 0x%04X
<7>.[31:16] <- 0x%04X
<7>.[7:0] <- 0x%02X
<7>.[15:8] <- 0x%02X
<7>.[23:16] <- 0x%02X
<7>.[31:24] <- 0x%02X
dst: shift: %d
src: mask: 0x%08x count: %d
no yes taken: %s
target: 0x%04X
RESERVED MOVE_REG MOVE_PS MOVE_WS MOVE_FB MOVE_PLL MOVE_MC AND_REG AND_PS AND_WS AND_FB AND_PLL AND_MC OR_REG OR_PS OR_WS OR_FB OR_PLL OR_MC SHIFT_LEFT_REG SHIFT_LEFT_PS SHIFT_LEFT_WS SHIFT_LEFT_FB SHIFT_LEFT_PLL SHIFT_LEFT_MC SHIFT_RIGHT_REG SHIFT_RIGHT_PS SHIFT_RIGHT_WS SHIFT_RIGHT_FB SHIFT_RIGHT_PLL SHIFT_RIGHT_MC MUL_REG MUL_PS MUL_WS MUL_FB MUL_PLL MUL_MC DIV_REG DIV_PS DIV_WS DIV_FB DIV_PLL DIV_MC ADD_REG ADD_PS ADD_WS ADD_FB ADD_PLL ADD_MC SUB_REG SUB_PS SUB_WS SUB_FB SUB_PLL SUB_MC SET_ATI_PORT SET_PCI_PORT SET_SYS_IO_PORT SET_REG_BLOCK SET_FB_BASE COMPARE_REG COMPARE_PS COMPARE_WS COMPARE_FB COMPARE_PLL COMPARE_MC SWITCH JUMP JUMP_EQUAL JUMP_BELOW JUMP_ABOVE JUMP_BELOW_OR_EQUAL JUMP_ABOVE_OR_EQUAL JUMP_NOT_EQUAL TEST_REG TEST_PS TEST_WS TEST_FB TEST_PLL TEST_MC DELAY_MILLISEC DELAY_MICROSEC CALL_TABLE REPEAT CLEAR_REG CLEAR_PS CLEAR_WS CLEAR_FB CLEAR_PLL CLEAR_MC NOP EOT MASK_REG MASK_PS MASK_WS MASK_FB MASK_PLL MASK_MC POST_CARD BEEP SAVE_REG RESTORE_REG SET_DATA_BLOCK XOR_REG XOR_PS XOR_WS XOR_FB XOR_PLL XOR_MC SHL_REG SHL_PS SHL_WS SHL_FB SHL_PLL SHL_MC SHR_REG SHR_PS SHR_WS SHR_FB SHR_PLL SHR_MC DEBUG CTB_DS ASIC_Init GetDisplaySurfaceSize ASIC_RegistersInit VRAM_BlockVenderDetection SetClocksRatio MemoryControllerInit GPIO_PinInit MemoryParamAdjust DVOEncoderControl GPIOPinControl SetEngineClock SetMemoryClock SetPixelClock DynamicClockGating ResetMemoryDLL ResetMemoryDevice MemoryPLLInit EnableMemorySelfRefresh AdjustMemoryController EnableASIC_StaticPwrMgt ASIC_StaticPwrMgtStatusChange DAC_LoadDetection TMDS2EncoderControl LCD1OutputControl DAC1EncoderControl DAC2EncoderControl DVOOutputControl CV1OutputControl SetCRTC_DPM_State TVEncoderControl TMDS1EncoderControl LVDSEncoderControl TV1OutputControl EnableScaler BlankCRTC EnableCRTC GetPixelClock EnableVGA_Render EnableVGA_Access SetCRTC_Timing SetCRTC_OverScan SetCRTC_Replication SelectCRTC_Source EnableGraphSurfaces LUT_AutoFill EnableHW_IconCursor GetMemoryClock GetEngineClock SetCRTC_UsingDTDTiming TVBootUpStdPinDetection DFP2OutputControl VRAM_BlockDetectionByStrap MemoryCleanUp ReadEDIDFromHWAssistedI2C WriteOneByteToHWAssistedI2C ReadHWAssistedI2CStatus SpeedFanControl PowerConnectorDetection MC_Synchronization ComputeMemoryEnginePLL MemoryRefreshConversion VRAM_GetCurrentInfoBlock DynamicMemorySettings MemoryTraining EnableLVDS_SS DFP1OutputControl SetVoltage CRT1OutputControl CRT2OutputControl SetupHWAssistedI2CStatus ClockSource MemoryDeviceInit EnableYUV MM PLL MC PCIE PCIE PORT radeon radeon.cp1 radeon.gfx radeon.cp2 radeon.dma radeon.dma1 radeon.uvd radeon.vce1 radeon.vce2 radeon.unk %d
--- ring %d ---
radeon_fence_info radeon_gpu_reset Unsupported memory type %u
Unknown placement %d
%p reserve failed
radeon_vram radeon_gtt Failed to init debugfs
radeon_vram_mm radeon_gtt_mm ttm_page_pool ttm_dma_page_pool %p %p %lu %lu force free
include/drm/drm_backport.h %p unpin not necessary
%p validate failed for unpin
%p pin failed
%p reserve failed
%p reserve failed
dc=%u, fd=%d, rd=%d, pd=%d
Wrote2: rd=%u, fd=%u, pd=%u
Wrote: rd=%d, fd=%d, pd=%d
%p reserve failed
No FB bound
Memory allocation failed
radeon_bl%d
bios LVDS_GEN_CNTL: 0x%x
Adding native panel mode %s
in favor of %s
load_detect %x returned: %x
PLL freq %llu %u %u
coherent tmds_pll load detection tv standard underscan underscan hborder underscan vborder audio dither output_csc radeon-crtc <6>[drm] Connector %d:
<6>[drm] %s
<6>[drm] Encoders:
<6>[drm] CRT1: %s
<6>[drm] CRT2: %s
<6>[drm] LCD1: %s
<6>[drm] DFP1: %s
<6>[drm] DFP2: %s
<6>[drm] DFP3: %s
<6>[drm] DFP4: %s
<6>[drm] DFP5: %s
<6>[drm] DFP6: %s
<6>[drm] TV1: %s
<6>[drm] CV: %s
%d
%p reserve failed
include/drm/drm_backport.h driver bios ntsc pal pal-m pal-60 ntsc-j scart-pal pal-cn secam off on auto bypass tvrgb ycbcr601 ycbcr709 HPD1 HPD2 HPD3 HPD4 HPD5 HPD6 NONE INTERNAL_LVDS INTERNAL_TMDS1 INTERNAL_TMDS2 INTERNAL_DAC1 INTERNAL_DAC2 INTERNAL_SDVOA INTERNAL_SDVOB SI170B CH7303 CH7301 INTERNAL_DVO1 EXTERNAL_SDVOA EXTERNAL_SDVOB TITFP513 INTERNAL_LVTM1 VT1623 HDMI_SI1930 HDMI_INTERNAL INTERNAL_KLDSCP_TMDS1 INTERNAL_KLDSCP_DVO1 INTERNAL_KLDSCP_DAC1 INTERNAL_KLDSCP_DAC2 SI178 MVPU_FPGA INTERNAL_DDI VT1625 HDMI_SI1932 DP_AN9801 DP_DP501 INTERNAL_UNIPHY INTERNAL_KLDSCP_LVTMA INTERNAL_UNIPHY1 INTERNAL_UNIPHY2 NUTMEG TRAVIS INTERNAL_VCE INTERNAL_UNIPHY3 x %d y %d c->x %d c->y %d
%p reserve failed
include/drm/drm_backport.h val = 0x%02x
i2c: unhandled radeon chip
&i2c->mutex Radeon i2c hw bus %s Failed to register hw i2c %s
Radeon i2c bit bus %s unsupported asic
i2c write error 0x%08x
i2c read error 0x%08x
failed to get i2c bus
failed to restore crtc mode
%p reserve failed
include/drm/drm_backport.h <6>[drm] vram apper at 0x%lX
<6>[drm] size %lu
<6>[drm] fb depth is %d
<6>[drm] pitch is %d
include/drm/drm_gem.h CPU include/drm/drm_backport.h unimplemented %s
%p reserve failed
%d
unsupported operation %d
Couldn't update BO_VA (%d)
radeon_gem_info GTT VRAM wptr: 0x%08x [%5d]
rptr: 0x%08x [%5d]
%u free dwords in ring
%u dwords in ring
r[%5d]=0x%08x * #
(%d) ring create failed
%p reserve failed
(%d) ring pin failed
(%d) ring map failed
radeon_ring_gfx radeon_ring_cp1 radeon_ring_cp2 radeon_ring_dma1 radeon_ring_dma2 radeon_ring_uvd radeon_ring_vce1 radeon_ring_vce2 radeon: using MSI.
<6>[drm] ib[%d]=0x%08X
0x%08x <---
0x%08x
No relocation chunk !
include/drm/drm_backport.h VM not active on asic!
unknown ring id: %d
Ring %d requires VM!
VM not supported on ring %d!
cs IB CONST too big: %d
Failed to get const ib !
cs IB too big: %d
Failed to get ib !
Invalid command stream !
Failed to sync rings: %i
Failed to schedule IB !
Tmp BO not in VM!
bo %p not in vm %p
ATRM Unable to allocate bios
VFCT ACPI VFCT image truncated
Unable to locate a BIOS ROM
ATOM MOTA COM %sBIOS detected
Unknown copy method
%p reserve failed
dma blit Unknown benchmark
drivers/gpu/drm/radeon/r100.c Requested: e: %d m: %d p: %d
No reloc for packet3 %d
No reloc for ib[%d]=0x%04X
cannot find crtc %d
unknown crtc reloc
Setting: p: %d
[drm] zbuffer (%u %u %u %u)
Max indices %u
No texture bound to unit %u
Unknown packet type %d !
CP_STAT 0x%08x
CP_RB_WPTR 0x%08x
CP_RB_RPTR 0x%08x
%u free dwords in ring
%u dwords in ring
r[%04d]=0x%08x
RBBM_STATUS 0x%08x
RBBM_CMDFIFO_STAT 0x%08x
[0x%03X] 0x%04X=0x%08X
CP_CSQ_MODE 0x%08x
CP_CSQ_STAT 0x%08x
CP_CSQ2_STAT 0x%08x
Ring rptr %u
Ring wptr %u
Indirect1 rptr %u
Indirect1 wptr %u
Indirect2 rptr %u
Indirect2 wptr %u
Ring fifo:
rfifo[%04d]=0x%08X
Indirect1 fifo:
ib1fifo[%04d]=0x%08X
Indirect2 fifo:
ib2fifo[%04d]=0x%08X
CONFIG_MEMSIZE 0x%08x
MC_FB_LOCATION 0x%08x
BUS_CNTL 0x%08x
MC_AGP_LOCATION 0x%08x
AGP_BASE 0x%08x
HOST_PATH_CNTL 0x%08x
AIC_CTRL 0x%08x
AIC_LO_ADDR 0x%08x
AIC_HI_ADDR 0x%08x
AIC_TLB_ADDR 0x%08x
writing surface %d %d %x %x
radeon/R100_cp.bin radeon/R200_cp.bin radeon/R300_cp.bin radeon/R420_cp.bin radeon/RS690_cp.bin radeon/RS600_cp.bin radeon/R520_cp.bin Failed to load firmware!
(%s:%d) RBBM_STATUS=0x%08X
failed to reset GPU
GPU reset succeed
Wait for MC idle timeout.
failed initializing CP (%d).
Disabling GPU acceleration
HPD1
HPD2
GRPH_BUFFER_CNTL from to %x
GRPH2_BUFFER_CNTL from to %x
r100_mc_info r100_cp_ring_info r100_cp_csq_fifo r100_rbbm_info No reloc for packet3 %d
Unknown packet type %d !
No reloc for ib[%d]=0x%04X
Invalid texture format %u
Forbidden bit TXFORMAT_MSB
drivers/gpu/drm/radeon/r300.c PCIE_TX_GART_CNTL 0x%08x
PCIE_TX_GART_BASE 0x%08x
PCIE_TX_GART_START_LO 0x%08x
PCIE_TX_GART_START_HI 0x%08x
PCIE_TX_GART_END_LO 0x%08x
PCIE_TX_GART_END_HI 0x%08x
PCIE_TX_GART_ERROR 0x%08x
failed initializing CP (%d).
Disabling GPU acceleration
(%s:%d) RBBM_STATUS=0x%08X
failed to reset GPU
GPU reset succeed
rv370_pcie_gart_info GB_PIPE_SELECT 0x%08x
GB_TILE_CONFIG 0x%08x
DST_PIPE_CONFIG 0x%08x
failed initializing CP (%d).
Disabling GPU acceleration
r420_pipes_info Forcing to 32M GART size
failed initializing CP (%d).
Disabling GPU acceleration
HOST_PATH_CNTL 0x%08x
BUS_CNTL 0x%08x
AIC_CTRL_SCRATCH 0x%08x
MCCFG_AGP_BASE 0x%08x
MCCFG_AGP_BASE_2 0x%08x
MCCFG_AGP_LOCATION 0x%08x
MCCFG_FB_LOCATION 0x%08x
HDP_FB_LOCATION 0x%08x
AGP_BASE 0x%08x
AGP_BASE_2 0x%08x
MC_AGP_LOCATION 0x%08x
GART_BASE 0x%08x
GART_FEATURE_ID 0x%08x
AGP_MODE_CONTROL 0x%08x
MC_MISC_CNTL 0x%08x
MC_MISC_UMA_CNTL 0x%08x
GART_CACHE_CNTRL 0x%08x
MC_GART_ERROR_ADDRESS 0x%08x
GART_ERROR_0 0x%08x
GART_ERROR_1 0x%08x
GART_ERROR_2 0x%08x
GART_ERROR_3 0x%08x
GART_ERROR_4 0x%08x
GART_ERROR_5 0x%08x
GART_ERROR_6 0x%08x
GART_ERROR_7 0x%08x
rs400_gart_info Setting: p: %d
failed initializing CP (%d).
failed initializing audio
Disabling GPU acceleration
(%s:%d) RBBM_STATUS=0x%08X
failed to reset GPU
GPU reset succeed
HPD1
HPD2
HDMI0
failed initializing CP (%d).
failed initializing audio
Disabling GPU acceleration
VAP_CNTL_STATUS 0x%08x
GA_IDLE 0x%08x
GB_PIPE_SELECT 0x%08x
SU_REG_DEST 0x%08x
GB_TILE_CONFIG 0x%08x
DST_PIPE_CONFIG 0x%08x
failed initializing CP (%d).
Disabling GPU acceleration
rv515_pipes_info rv515_ga_info failed initializing CP (%d).
Disabling GPU acceleration
Requested: e: %d m: %d p: %d
REDWOOD RV770 R600 RV620 RV630 RV635 RV670 R700 RV730 RV710 RV740 JUNIPER CYPRESS SUMO PALM SUMO2 drivers/gpu/drm/radeon/r600.c RS780 radeon/%s_pfp.bin radeon/%s_me.bin radeon/%s_rlc.bin radeon/%s_smc.bin RV610 CEDAR Setting: v: %d
%p reserve failed
radeon: moving bo (%d).
VM_L2_STATUS : 0x%08X
MC busy: 0x%08X, clearing.
Wait for MC idle timedout !
dpm thermal
r600_irq_set: sw int
r600_irq_set: sw int dma
r600_irq_set: vblank 0
r600_irq_set: vblank 1
r600_irq_set: hpd 1
r600_irq_set: hpd 2
r600_irq_set: hpd 3
r600_irq_set: hpd 4
r600_irq_set: hpd 5
r600_irq_set: hpd 6
r600_irq_set: hdmi 0
radeon: IH init failed (%d).
radeon: audio init failed
IH: D1 vblank
IH: D1 vline
Unhandled interrupt: %d %d
IH: D2 vblank
IH: D2 vline
IH: D1 flip
IH: D2 flip
IH: HPD1
IH: HPD2
IH: HPD3
IH: HPD4
IH: HPD5
IH: HPD6
IH: HDMI0
IH: HDMI1
IH: UVD int: 0x%08x
IH: CP int: 0x%08x
IH: CP EOP
IH: DMA trap
IH: thermal low to high
IH: thermal high to low
IH: GUI idle
limiting VRAM
Failed to load firmware!
disabling GPU acceleration
GPU softreset: 0x%08X
SRBM_SOFT_RESET=0x%08X
GPU pci config reset
r600_mc_info limiting VRAM
Setting: v: %d
Wait for MC idle timedout !
UVD fences init error (%d).
radeon: IH init failed (%d).
radeon: audio init failed
Failed to load firmware!
disabling GPU acceleration
Failed to lock ring A %d
Failed to create semaphore
Failed to lock ring B %d
Failed to lock ring B %p
Unknown copy method
Failed to create VRAM object
%p reserve failed
Failed to pin VRAM object
Failed to pin GTT object %d
Failed to map GTT object %d
Failed GTT->VRAM copy %d
Failed VRAM->GTT copy %d
No reloc for ib[%d]=0x%04X
radeon: moving bo (%d).
No relocation chunk !
bad DMA_PACKET_WRITE
bad DMA_PACKET_COPY
Constant Fill is 7xx only !
No buffer for streamout %d
%s invalid tile mode
%s:%d invalid num pipes %d
bad SET_CONTEXT_REG 0x%04X
bad SET_CONFIG_REG 0x%04X
vline WAIT_REG_MEM bad reg
cannot find crtc %d
unknown crtc reloc
No reloc for ib[%d]=0x%04X
bad SET PREDICATION
bad START_3D
bad CONTEXT_CONTROL
bad INDEX_TYPE/NUM_INSTANCES
bad DRAW_INDEX
%s:%d invalid cmd stream
bad DRAW_INDEX_AUTO
%s:%d invalid cmd stream %d
bad DRAW_INDEX_IMMD
bad WAIT_REG_MEM
cannot use PFP on REG wait
bad CP DMA
CP DMA SAS not supported
bad CP DMA SRC
CP DMA DAS not supported
bad CP DMA DST
bad SURFACE_SYNC
bad EVENT_WRITE
bad EVENT_WRITE_EOP
bad PACKET3_SET_CONFIG_REG
bad PACKET3_SET_CONTEXT_REG
bad SET_RESOURCE
alignments %d %d %d %lld
bad SET_ALU_CONST
bad SET_BOOL_CONST
bad SET_LOOP_CONST
bad SET_CTL_CONST
bad SET_SAMPLER
bad SURFACE_BASE_UPDATE
bad COPY_DW (invalid count)
Unknown packet type %d !
Invalid command stream !
Failed to parse relocation !
entry exit Setting: e: %d
Setting: m: %d
pm: GUI not idle!!!
switching from power state:
switching to power state:
default auto low mid high battery balanced performance dynpm profile dpm %s
off
%d
%i
radeon: dpm resume failed
PX asic powered off
voltage: %u mV
PCIE lanes: %d
== power state %d ==
%d Power State(s)
State %d: %s
Default %d PCIE Lanes
Single display only
%d Clock Mode(s)
%d e: %d
%d e: %d m: %d v: %d
power_dpm_state power_profile power_method temp1_crit temp1_crit_hyst pwm1 pwm1_enable pwm1_min pwm1_max radeon_pm_info Powersave Battery Balanced Performance temp1_input clock recovery tried 5 times
clock recovery failed
channel eq failed: 5 tries
channel eq failed
DPCD: %*ph
Sink OUI: %02hx%02hx%02hx
Branch OUI: %02hx%02hx%02hx
dp_aux_ch timeout
dp_aux_ch flags not zero
dp_aux_ch error
0dB 3.5dB 6dB 9.5dB 0.4V 0.6V 0.8V 1.2V Dis En stopped playing Setting: vddc: %d
Setting: vddci: %d
%p reserve failed
(%d) reserve RLC c bo failed
(%d) create RLC sr bo failed
(%d) pin RLC sr bo failed
(%d) map RLC sr bo failed
(%d) create RLC c bo failed
(%d) pin RLC c bo failed
(%d) map RLC c bo failed
MC busy: 0x%08X, clearing.
force priority a to high
force priority b to high
GPU pci config reset
Wait for MC idle timed out !
Wait for MC idle timedout !
r600_irq_set: sw int dma
r600_irq_set: sw int dma1
dpm thermal
evergreen_irq_set: vblank 0
evergreen_irq_set: vblank 1
evergreen_irq_set: vblank 2
evergreen_irq_set: vblank 3
evergreen_irq_set: vblank 4
evergreen_irq_set: vblank 5
evergreen_irq_set: hpd 1
evergreen_irq_set: hpd 2
evergreen_irq_set: hpd 3
evergreen_irq_set: hpd 4
evergreen_irq_set: hpd 5
evergreen_irq_set: hpd 6
evergreen_irq_set: hdmi 0
evergreen_irq_set: hdmi 1
evergreen_irq_set: hdmi 2
evergreen_irq_set: hdmi 3
evergreen_irq_set: hdmi 4
evergreen_irq_set: hdmi 5
Failed to load MC firmware!
Failed to init rlc BOs!
UVD fences init error (%d).
radeon: IH init failed (%d).
radeon: audio init failed
GPU reset failed !
Failed to load firmware!
disabling GPU acceleration
IH: D1 vblank
IH: D1 vline
Unhandled interrupt: %d %d
IH: D2 vblank
IH: D2 vline
IH: D3 vblank
IH: D3 vline
IH: D4 vblank
IH: D4 vline
IH: D5 vblank
IH: D5 vline
IH: D6 vblank
IH: D6 vline
IH: D%d flip
IH: HPD1
IH: HPD2
IH: HPD3
IH: HPD4
IH: HPD5
IH: HPD6
IH: HPD_RX 1
IH: HPD_RX 2
IH: HPD_RX 3
IH: HPD_RX 4
IH: HPD_RX 5
IH: HPD_RX 6
IH: HDMI0
IH: HDMI1
IH: HDMI2
IH: HDMI3
IH: HDMI4
IH: HDMI5
SRBM_READ_ERROR: 0x%x
IH: UVD int: 0x%08x
IH: CP int: 0x%08x
IH: CP EOP
IH: DMA trap
IH: thermal low to high
IH: thermal high to low
IH: GUI idle
IH: DMA1 trap
GPU softreset: 0x%08X
GRBM_SOFT_RESET=0x%08X
SRBM_SOFT_RESET=0x%08X
Invalid register 0x%x in CS
Packet0 not allowed!
bad SET_BASE bad PACKET3_SET_CONFIG_REG
CP DMA Bad SRC register
CP DMA Bad DST register
Unknown packet type %d !
bad DMA_PACKET_WRITE
bad DMA_PACKET_COPY
L2L Partial is cayman only !
bad DMA_PACKET_CONSTANT_FILL
%s:%d %s invalid bankw %d
%s:%d %s invalid bankh %d
%s:%d invalid num pipes %d
bad SET_CONTEXT_REG 0x%04X
bad SET_CONFIG_REG 0x%04X
No buffer for streamout %d
cb stencil depth bad SET PREDICATION
bad CONTEXT_CONTROL
bad PACKET3_DEALLOC_STATE
bad INDEX_BASE
%s:%d invalid cmd stream
bad INDEX_BUFFER_SIZE
bad DRAW_INDEX
bad DRAW_INDEX_2
bad DRAW_INDEX_AUTO
%s:%d invalid cmd stream %d
bad DRAW_INDEX_MULTI_AUTO
bad DRAW_INDEX_IMMD
bad DRAW_INDEX_OFFSET
bad DRAW_INDEX_OFFSET_2
bad SET_BASE
bad DRAW_INDIRECT
bad DISPATCH_DIRECT
bad DISPATCH_INDIRECT
bad WAIT_REG_MEM
cannot use PFP on REG wait
bad CP DMA
CP DMA SAS not supported
bad CP DMA SRC
bad CP DMA SRC_SEL
CP DMA DAS not supported
bad CP DMA DST
bad CP DMA DST_SEL
bad SURFACE_SYNC
bad EVENT_WRITE
bad EVENT_WRITE_EOP
bad EVENT_WRITE_EOS
bad PACKET3_SET_CONTEXT_REG
bad SET_RESOURCE
bad SET_RESOURCE (tex)
texture %s:%d invalid array mode %d
mipmap bad SET_RESOURCE (vtx)
bad SET_BOOL_CONST
bad SET_LOOP_CONST
bad SET_CTL_CONST
bad SET_SAMPLER
bad COPY_DW (invalid count)
No reloc for ib[%d]=0x%04X
Dis En radeon_bo_create %s: bo=%p, pages=%u
radeon_cs ring=%u, dw=%u, fences=%u
radeon_vm_grab_id vmid=%u, ring=%u
radeon_vm_bo_update radeon_vm_set_page radeon_vm_flush dev=%u, ring=%d, seqno=%u
radeon_fence_emit radeon_fence_wait_begin radeon_fence_wait_end radeon_semaphore_signale radeon_semaphore_wait bo struct radeon_bo * pages u32 ring dw fences vmid soffset u64 eoffset flags pe addr count incr pd_addr id dev int seqno waiters signed gpu_addr uint64_t radeon unknown read write
BTC TURKS CAICOS CAYMAN ARUBA drivers/gpu/drm/radeon/ni.c BARTS radeon/%s_pfp.bin radeon/%s_me.bin radeon/%s_rlc.bin radeon/%s_mc.bin radeon/%s_smc.bin MC busy: 0x%08X, clearing.
Failed to load MC firmware!
Failed to init rlc BOs!
UVD fences init error (%d).
VCE init error (%d).
radeon: IH init failed (%d).
Failed to load firmware!
disabling GPU acceleration
GPU softreset: 0x%08X
Wait for MC idle timedout !
GRBM_SOFT_RESET=0x%08X
SRBM_SOFT_RESET=0x%08X
CB CB_FMASK CB_CMASK CB_IMMED DB DB_HTILE SX DB_STEN TC_TFETCH TC_VFETCH VC RLC DMA HDP CP SH VGT IH chosen encoder in use %d
Unknown table for MST %d, %d
Unknown table version %d, %d
Memory allocation failed
radeon_bl%d Bios 0 scratch %x %08x
detect returned false
>
no bo for sa manager
%p reserve failed
hw_i2c error
Timeout setting UVD clocks!
Invalid register 0x%x in CS
CP DMA Bad SRC register
CP DMA Bad DST register
Packet0 not allowed!
Invalid CE packet3: 0x%x
bad PACKET3_SET_CONFIG_REG
Invalid GFX packet3: 0x%x
Non-PM4 ring %d !
Unknown packet type %d !
0x%08x <---
0x%08x
limiting VRAM
MC busy: 0x%08X, clearing.
force priority to high
unknown asic: 0x%x
IH: D1 vblank
IH: D1 vline
Unhandled interrupt: %d %d
IH: D2 vblank
IH: D2 vline
IH: D3 vblank
IH: D3 vline
IH: D4 vblank
IH: D4 vline
IH: D5 vblank
IH: D5 vline
IH: D6 vblank
IH: D6 vline
IH: D%d flip
IH: HPD1
IH: HPD2
IH: HPD3
IH: HPD4
IH: HPD5
IH: HPD6
IH: HPD_RX 1
IH: HPD_RX 2
IH: HPD_RX 3
IH: HPD_RX 4
IH: HPD_RX 5
IH: HPD_RX 6
SRBM_READ_ERROR: 0x%x
IH: UVD int: 0x%08x
unknown read write IH: CP EOP
IH: DMA trap
IH: thermal low to high
IH: thermal high to low
IH: GUI idle
IH: DMA1 trap
drivers/gpu/drm/radeon/si.c si_irq_set: sw int gfx
si_irq_set: sw int cp1
si_irq_set: sw int cp2
si_irq_set: sw int dma
si_irq_set: sw int dma1
si_irq_set: vblank 0
si_irq_set: vblank 1
si_irq_set: vblank 2
si_irq_set: vblank 3
si_irq_set: vblank 4
si_irq_set: vblank 5
si_irq_set: hpd 1
si_irq_set: hpd 2
si_irq_set: hpd 3
si_irq_set: hpd 4
si_irq_set: hpd 5
si_irq_set: hpd 6
dpm thermal
GPU softreset: 0x%08X
Wait for MC idle timedout !
GRBM_SOFT_RESET=0x%08X
SRBM_SOFT_RESET=0x%08X
GPU pci config reset
Wait for MC idle timed out !
Failed to load MC firmware!
Failed to init rlc BOs!
UVD fences init error (%d).
VCE init error (%d).
radeon: IH init failed (%d).
pitcairn PITCAIRN verde VERDE oland OLAND hainan HAINAN tahiti TAHITI radeon/%s_pfp.bin radeon/%s_me.bin radeon/%s_ce.bin radeon/%s_rlc.bin radeon/%s_mc.bin radeon/%s_mc2.bin <6>[drm] %s: %zu bytes
radeon/%s_smc.bin Failed to load firmware!
disabling GPU acceleration
si startup failed on resume
TC CB CB_FMASK CB_CMASK CB_IMMED DB DB_HTILE DB_STEN CP SH RLC VGT DMA1 IH DMA0 HDP %p reserve failed
hawaii HAWAII kaveri KAVERI kabini KABINI mullins MULLINS drivers/gpu/drm/radeon/cik.c bonaire BONAIRE radeon/%s_pfp.bin radeon/%s_me.bin radeon/%s_ce.bin radeon/%s_mec.bin radeon/%s_mec2.bin radeon/%s_rlc.bin radeon/%s_sdma.bin radeon/%s_mc.bin radeon/%s_mc2.bin <6>[drm] %s: %zu bytes
radeon/%s_smc.bin %p reserve failed
radeon: moving bo (%d).
GRBM_STATUS=0x%08X
GRBM_STATUS2=0x%08X
GRBM_STATUS_SE0=0x%08X
GRBM_STATUS_SE1=0x%08X
GRBM_STATUS_SE2=0x%08X
GRBM_STATUS_SE3=0x%08X
SRBM_STATUS=0x%08X
SRBM_STATUS2=0x%08X
CP_STAT = 0x%08x
CP_STALLED_STAT1 = 0x%08x
CP_STALLED_STAT2 = 0x%08x
CP_STALLED_STAT3 = 0x%08x
CP_CPF_BUSY_STAT = 0x%08x
CP_CPF_STATUS = 0x%08x
CP_CPC_BUSY_STAT = 0x%08x
CP_CPC_STATUS = 0x%08x
MC busy: 0x%08X, clearing.
Wait for MC idle timedout !
force priority to high
Mode too big for LB!
(%d) reserve MQD bo failed
(%d) create MQD bo failed
(%d) pin MQD bo failed
(%d) map MQD bo failed
cik_irq_set: sw int gfx
si_irq_set: sw int cp1
si_irq_set: sw int cp2
cik_irq_set: sw int dma
cik_irq_set: sw int dma1
cik_irq_set: vblank 0
cik_irq_set: vblank 1
cik_irq_set: vblank 2
cik_irq_set: vblank 3
cik_irq_set: vblank 4
cik_irq_set: vblank 5
cik_irq_set: hpd 1
cik_irq_set: hpd 2
cik_irq_set: hpd 3
cik_irq_set: hpd 4
cik_irq_set: hpd 5
cik_irq_set: hpd 6
IH: D1 vblank
IH: D1 vline
Unhandled interrupt: %d %d
IH: D2 vblank
IH: D2 vline
IH: D3 vblank
IH: D3 vline
IH: D4 vblank
IH: D4 vline
IH: D5 vblank
IH: D5 vline
IH: D6 vblank
IH: D6 vline
IH: D%d flip
IH: HPD1
IH: HPD2
IH: HPD3
IH: HPD4
IH: HPD5
IH: HPD6
IH: HPD_RX 1
IH: HPD_RX 2
IH: HPD_RX 3
IH: HPD_RX 4
IH: HPD_RX 5
IH: HPD_RX 6
SRBM_READ_ERROR: 0x%x
IH: UVD int: 0x%08x
read write IH: VCE int: 0x%08x
IH: CP EOP
IH: SDMA trap
IH: thermal low to high
IH: thermal high to low
IH: GUI idle
GPU softreset: 0x%08X
GRBM_SOFT_RESET=0x%08X
SRBM_SOFT_RESET=0x%08X
GPU pci config reset
Wait for MC idle timed out !
Failed to load MC firmware!
Failed to init rlc BOs!
(%d) pin HDP EOP bo failed
(%d) map HDP EOP bo failed
Failed to init MEC BOs!
UVD fences init error (%d).
VCE init error (%d).
radeon: IH init failed (%d).
Failed to load firmware!
disabling GPU acceleration
cik startup failed on resume
status: c r b
caps: single_disp video no_dc ui class: none
battery
balanced
performance
internal class: none boot thermal limited_pwr rest forced 3d_perf ovrdrv uvd 3d_low acpi uvd_hd2 uvd_hd uvd_sd limited_pwr2 ulv uvd_mvc uvd vclk: %d dclk: %d
uvd vclk: %d dclk: %d
uvd vclk: %d dclk: %d
invalid dpm profile %d
uvd vclk: %d dclk: %d
uvd vclk: %d dclk: %d
rv770_set_sw_state failed
Could not force DPM to low.
rv770_halt_smc failed
rv770_upload_sw_state failed
rv770_resume_smc failed
invalid dpm profile %d
uvd vclk: %d dclk: %d
rv770_upload_firmware failed
rv770_init_smc_table failed
Could not force DPM to low
rv770_halt_smc failed
rv770_resume_smc failed
rv770_set_sw_state failed
rv770_upload_firmware failed
invalid dpm profile %d
uvd vclk: %d dclk: %d
Failed to load MC firmware!
rv770_halt_smc failed
rv770_resume_smc failed
rv770_set_sw_state failed
rv770_upload_firmware failed
uvd vclk: %d dclk: %d
uvd vclk: %d dclk: %d
invalid dpm profile %d
Unsupported IGP table: %d %d
uvd vclk: %d dclk: %d
Unsupported IGP table: %d %d
engine clock out of range! UVD clock index not found!
invalid dpm profile %d
uvd vclk: %d dclk: %d
Unknown SMC message!
uvd vclk: %d dclk: %d
invalid dpm profile %d
uvd vclk: %d dclk: %d
Failed to load MC firmware!
rv770_upload_firmware failed
ni_init_smc_table failed
ni_enable_smc_cac failed
rv770_halt_smc failed
ni_upload_sw_state failed
rv770_resume_smc failed
rv770_set_sw_state failed
invalid dpm profile %d
uvd vclk: %d dclk: %d
DTE is not enabled!
Failed to load MC firmware!
si_upload_firmware failed
si_init_smc_table failed
si_enable_smc_cac failed
si_halt_smc failed
si_upload_sw_state failed
si_upload_ulv_state failed
si_resume_smc failed
si_disable_ulv failed
si_set_sw_state failed
uvd vclk: %d dclk: %d
invalid dpm profile %d
en dis uvd %sabled
vce %sabled
Unsupported IGP table: %d %d
kv_smc_bapm_enable failed
kv_update_vce_dpm failed
kv_populate_uvd_table failed
kv_populate_vce_table failed
kv_populate_acp_table failed
kv_set_dpm_interval failed
kv_set_dpm_boot_state failed
kv_enable_ulv failed
kv_enable_didt failed
kv_enable_smc_cac failed
uvd vclk: %d dclk: %d
Invalid PCC GPIO: %u!
Failed to load MC firmware!
dis en uvd %sabled
vce %sabled
ci_update_vce_dpm failed
ci_update_sclk_t failed
ci_upload_firmware failed
ci_init_smc_table failed
ci_enable_ulv failed
ci_start_dpm failed
ci_enable_didt failed
ci_enable_smc_cac failed
ci_populate_pm_base failed
%p reserve failed
&vm->mutex still active bo inside vm
size_bytes: %u
header_size_bytes: %u
header_version_major: %u
header_version_minor: %u
ip_version_major: %u
ip_version_minor: %u
ucode_version: 0x%08x
ucode_size_bytes: %u
ucode_array_offset_bytes: %u
crc32: 0x%08x
SDMA
ucode_feature_version: %u
ucode_change_version: %u
jt_offset: %u
jt_size: %u
RLC
save_and_restore_offset: %u
GFX
SMC
ucode_start_addr: %u
MC
io_debug_size_bytes: %u
couldn't schedule ib
scheduling IB failed (%d).
failed to sync rings (%d)
failed to get a new IB (%d)
radeon_sa_info Syncing to a disabled ring! Couldn't read SADs: %d
dp_aux_ch timed out
checking %p vs %p
edid retrieved %p
enc master is %p
dig clock %p %d %d
attrib %d: %d %d
got esi %02x %02x %02x
got esi2 %02x %02x %02x
Sink is MST capable
Sink is not MST capable
dp_clock %p %d
writing 0x%08x 0x%08x
got mst dpms on non-DCE5
got connector %d
dig encoder is %d %d %d
DPMS OFF %d
failed to find connector %p
%d %d
radeon_mst_info &rmn->lock radeon: moving bo (%d).
radeon: moving bo (%d).
radeon: moving bo (%d).
radeon: moving bo (%d).
radeon: moving bo (%d).
No relocation chunk !
invalid reloc offset %X!
invalid UVD command %X!
Invalid UVD handle!
Handle 0x%x already in use!
No more free UVD handles!
UVD codec not handled %d!
Invalid UVD handle 0x%x!
Invalid reg 0x%X!
Unknown packet type %d !
UVD-IBs need a msg command!
radeon/RS780_uvd.bin radeon/R600_uvd.bin radeon/RV770_uvd.bin radeon/RV710_uvd.bin radeon/CYPRESS_uvd.bin radeon/SUMO_uvd.bin radeon/TAHITI_uvd.bin radeon/BONAIRE_uvd.bin %p reserve failed
(%d) UVD bo pin failed
(%d) UVD map failed
Timeout setting UVD clocks!
Error destroying UVD (%d)!
invalid reloc offset %llX!
buffer to small (%d / %d)!
No more free VCE handles!
Handle already in use!
invalid VCE command (0x%x)!
radeon/BONAIRE_vce.bin radeon/TAHITI_vce.bin %2hhd.%2hhd.%2hhd] %2u] %p reserve failed
(%d) VCE bo pin failed
radeon: ring %d test failed
(%d) VCE map failed
[ATI LIB=VCEFWSTATS, [ATI LIB=VCEFW, ATPX ATCS ATIF video SBIOS pending requests: %#x
Changing brightness to %d
ac_adapter pm: AC
pm: DC
ATCS version %u
ATIF version %u
disabled enabled license=GPL and additional rights description=ATI Radeon author=Gareth Hughes, Keith Whitwell, others. parmtype=mst:int parm=mst:DisplayPort MST experimental support (1 = enable, 0 = disable) parmtype=auxch:int parm=auxch:Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto) parmtype=backlight:int parm=backlight:backlight support (1 = enable, 0 = disable, -1 = auto) parmtype=bapm:int parm=bapm:BAPM support (1 = enable, 0 = disable, -1 = auto) parmtype=use_pflipirq:int parm=use_pflipirq:Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default)) parmtype=deep_color:int parm=deep_color:Deep Color support (1 = enable, 0 = disable (default)) parmtype=vm_block_size:int parm=vm_block_size:VM page table size in bits (default depending on vm_size) parmtype=vm_size:int parm=vm_size:VM address space size in gigabytes (default 4GB) parmtype=hard_reset:int parm=hard_reset:PCI config reset (1 = force enable, 0 = disable (default)) parmtype=runpm:int parm=runpm:PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default) parmtype=aspm:int parm=aspm:ASPM support (1 = enable, 0 = disable, -1 = auto) parmtype=dpm:int parm=dpm:DPM support (1 = enable, 0 = disable, -1 = auto) parmtype=fastfb:int parm=fastfb:Direct FB access for IGP chips (0 = disable, 1 = enable) parmtype=lockup_timeout:int parm=lockup_timeout:GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable) parmtype=msi:int parm=msi:MSI support (1 = enable, 0 = disable, -1 = auto) parmtype=pcie_gen2:int parm=pcie_gen2:PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable) parmtype=hw_i2c:int parm=hw_i2c:hw i2c engine enable (0 = disable) parmtype=disp_priority:int parm=disp_priority:Display Priority (0 = auto, 1 = normal, 2 = high) parmtype=audio:int parm=audio:Audio enable (-1 = auto, 0 = disable, 1 = enable) parmtype=tv:int parm=tv:TV enable (0 = disable) parmtype=connector_table:int parm=connector_table:Force connector table parmtype=test:int parm=test:Run tests parmtype=benchmark:int parm=benchmark:Run benchmark parmtype=gartsize:int parm=gartsize:Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto) parmtype=agpmode:int parm=agpmode:AGP Mode (-1 == PCI) parmtype=vramlimit:int parm=vramlimit:Restrict VRAM for testing, in megabytes parmtype=r4xx_atom:int parm=r4xx_atom:Enable ATOMBIOS modesetting for R4xx parmtype=dynclks:int parm=dynclks:Disable/Enable dynamic clocks parmtype=modeset:int parm=modeset:Disable/Enable modesetting parmtype=no_wb:int parm=no_wb:Disable AGP writeback for scratch registers firmware=radeon/R520_cp.bin firmware=radeon/RS600_cp.bin firmware=radeon/RS690_cp.bin firmware=radeon/R420_cp.bin firmware=radeon/R300_cp.bin firmware=radeon/R200_cp.bin firmware=radeon/R100_cp.bin firmware=radeon/RV710_me.bin firmware=radeon/RV710_pfp.bin firmware=radeon/RV730_me.bin firmware=radeon/RV730_pfp.bin firmware=radeon/RV770_me.bin firmware=radeon/RV770_pfp.bin firmware=radeon/RS780_me.bin firmware=radeon/RS780_pfp.bin firmware=radeon/RV670_me.bin firmware=radeon/RV670_pfp.bin firmware=radeon/RV635_me.bin firmware=radeon/RV635_pfp.bin firmware=radeon/RV620_me.bin firmware=radeon/RV620_pfp.bin firmware=radeon/RV630_me.bin firmware=radeon/RV630_pfp.bin firmware=radeon/RV610_me.bin firmware=radeon/RV610_pfp.bin firmware=radeon/R600_me.bin firmware=radeon/R600_pfp.bin firmware=radeon/R520_cp.bin firmware=radeon/RS600_cp.bin firmware=radeon/RS690_cp.bin firmware=radeon/R420_cp.bin firmware=radeon/R300_cp.bin firmware=radeon/R200_cp.bin firmware=radeon/R100_cp.bin firmware=radeon/SUMO2_me.bin firmware=radeon/SUMO2_pfp.bin firmware=radeon/SUMO_me.bin firmware=radeon/SUMO_pfp.bin firmware=radeon/SUMO_rlc.bin firmware=radeon/PALM_me.bin firmware=radeon/PALM_pfp.bin firmware=radeon/CYPRESS_smc.bin firmware=radeon/CYPRESS_rlc.bin firmware=radeon/CYPRESS_me.bin firmware=radeon/CYPRESS_pfp.bin firmware=radeon/JUNIPER_smc.bin firmware=radeon/JUNIPER_rlc.bin firmware=radeon/JUNIPER_me.bin firmware=radeon/JUNIPER_pfp.bin firmware=radeon/REDWOOD_smc.bin firmware=radeon/REDWOOD_rlc.bin firmware=radeon/REDWOOD_me.bin firmware=radeon/REDWOOD_pfp.bin firmware=radeon/CEDAR_smc.bin firmware=radeon/CEDAR_rlc.bin firmware=radeon/CEDAR_me.bin firmware=radeon/CEDAR_pfp.bin firmware=radeon/R700_rlc.bin firmware=radeon/R600_rlc.bin firmware=radeon/RV710_smc.bin firmware=radeon/RV710_me.bin firmware=radeon/RV710_pfp.bin firmware=radeon/RV740_smc.bin firmware=radeon/RV730_smc.bin firmware=radeon/RV730_me.bin firmware=radeon/RV730_pfp.bin firmware=radeon/RV770_smc.bin firmware=radeon/RV770_me.bin firmware=radeon/RV770_pfp.bin firmware=radeon/RS780_me.bin firmware=radeon/RS780_pfp.bin firmware=radeon/RV670_me.bin firmware=radeon/RV670_pfp.bin firmware=radeon/RV635_me.bin firmware=radeon/RV635_pfp.bin firmware=radeon/RV620_me.bin firmware=radeon/RV620_pfp.bin firmware=radeon/RV630_me.bin firmware=radeon/RV630_pfp.bin firmware=radeon/RV610_me.bin firmware=radeon/RV610_pfp.bin firmware=radeon/R600_me.bin firmware=radeon/R600_pfp.bin firmware=radeon/ARUBA_rlc.bin firmware=radeon/ARUBA_me.bin firmware=radeon/ARUBA_pfp.bin firmware=radeon/CAYMAN_smc.bin firmware=radeon/CAYMAN_rlc.bin firmware=radeon/CAYMAN_mc.bin firmware=radeon/CAYMAN_me.bin firmware=radeon/CAYMAN_pfp.bin firmware=radeon/CAICOS_smc.bin firmware=radeon/CAICOS_mc.bin firmware=radeon/CAICOS_me.bin firmware=radeon/CAICOS_pfp.bin firmware=radeon/TURKS_smc.bin firmware=radeon/TURKS_mc.bin firmware=radeon/TURKS_me.bin firmware=radeon/TURKS_pfp.bin firmware=radeon/BTC_rlc.bin firmware=radeon/BARTS_smc.bin firmware=radeon/BARTS_mc.bin firmware=radeon/BARTS_me.bin firmware=radeon/BARTS_pfp.bin firmware=radeon/hainan_smc.bin firmware=radeon/hainan_rlc.bin firmware=radeon/hainan_mc.bin firmware=radeon/hainan_ce.bin firmware=radeon/hainan_me.bin firmware=radeon/hainan_pfp.bin firmware=radeon/HAINAN_smc.bin firmware=radeon/HAINAN_rlc.bin firmware=radeon/HAINAN_mc2.bin firmware=radeon/HAINAN_mc.bin firmware=radeon/HAINAN_ce.bin firmware=radeon/HAINAN_me.bin firmware=radeon/HAINAN_pfp.bin firmware=radeon/oland_smc.bin firmware=radeon/oland_rlc.bin firmware=radeon/oland_mc.bin firmware=radeon/oland_ce.bin firmware=radeon/oland_me.bin firmware=radeon/oland_pfp.bin firmware=radeon/OLAND_smc.bin firmware=radeon/OLAND_rlc.bin firmware=radeon/OLAND_mc2.bin firmware=radeon/OLAND_mc.bin firmware=radeon/OLAND_ce.bin firmware=radeon/OLAND_me.bin firmware=radeon/OLAND_pfp.bin firmware=radeon/verde_smc.bin firmware=radeon/verde_rlc.bin firmware=radeon/verde_mc.bin firmware=radeon/verde_ce.bin firmware=radeon/verde_me.bin firmware=radeon/verde_pfp.bin firmware=radeon/VERDE_smc.bin firmware=radeon/VERDE_rlc.bin firmware=radeon/VERDE_mc2.bin firmware=radeon/VERDE_mc.bin firmware=radeon/VERDE_ce.bin firmware=radeon/VERDE_me.bin firmware=radeon/VERDE_pfp.bin firmware=radeon/pitcairn_smc.bin firmware=radeon/pitcairn_rlc.bin firmware=radeon/pitcairn_mc.bin firmware=radeon/pitcairn_ce.bin firmware=radeon/pitcairn_me.bin firmware=radeon/pitcairn_pfp.bin firmware=radeon/PITCAIRN_smc.bin firmware=radeon/PITCAIRN_rlc.bin firmware=radeon/PITCAIRN_mc2.bin firmware=radeon/PITCAIRN_mc.bin firmware=radeon/PITCAIRN_ce.bin firmware=radeon/PITCAIRN_me.bin firmware=radeon/PITCAIRN_pfp.bin firmware=radeon/tahiti_smc.bin firmware=radeon/tahiti_rlc.bin firmware=radeon/tahiti_mc.bin firmware=radeon/tahiti_ce.bin firmware=radeon/tahiti_me.bin firmware=radeon/tahiti_pfp.bin firmware=radeon/TAHITI_smc.bin firmware=radeon/TAHITI_rlc.bin firmware=radeon/TAHITI_mc2.bin firmware=radeon/TAHITI_mc.bin firmware=radeon/TAHITI_ce.bin firmware=radeon/TAHITI_me.bin firmware=radeon/TAHITI_pfp.bin firmware=radeon/mullins_sdma.bin firmware=radeon/mullins_rlc.bin firmware=radeon/mullins_mec.bin firmware=radeon/mullins_ce.bin firmware=radeon/mullins_me.bin firmware=radeon/mullins_pfp.bin firmware=radeon/MULLINS_sdma.bin firmware=radeon/MULLINS_rlc.bin firmware=radeon/MULLINS_mec.bin firmware=radeon/MULLINS_ce.bin firmware=radeon/MULLINS_me.bin firmware=radeon/MULLINS_pfp.bin firmware=radeon/kabini_sdma.bin firmware=radeon/kabini_rlc.bin firmware=radeon/kabini_mec.bin firmware=radeon/kabini_ce.bin firmware=radeon/kabini_me.bin firmware=radeon/kabini_pfp.bin firmware=radeon/KABINI_sdma.bin firmware=radeon/KABINI_rlc.bin firmware=radeon/KABINI_mec.bin firmware=radeon/KABINI_ce.bin firmware=radeon/KABINI_me.bin firmware=radeon/KABINI_pfp.bin firmware=radeon/kaveri_sdma.bin firmware=radeon/kaveri_rlc.bin firmware=radeon/kaveri_mec2.bin firmware=radeon/kaveri_mec.bin firmware=radeon/kaveri_ce.bin firmware=radeon/kaveri_me.bin firmware=radeon/kaveri_pfp.bin firmware=radeon/KAVERI_sdma.bin firmware=radeon/KAVERI_rlc.bin firmware=radeon/KAVERI_mec.bin firmware=radeon/KAVERI_ce.bin firmware=radeon/KAVERI_me.bin firmware=radeon/KAVERI_pfp.bin firmware=radeon/hawaii_smc.bin firmware=radeon/hawaii_sdma.bin firmware=radeon/hawaii_rlc.bin firmware=radeon/hawaii_mc.bin firmware=radeon/hawaii_mec.bin firmware=radeon/hawaii_ce.bin firmware=radeon/hawaii_me.bin firmware=radeon/hawaii_pfp.bin firmware=radeon/HAWAII_smc.bin firmware=radeon/HAWAII_sdma.bin firmware=radeon/HAWAII_rlc.bin firmware=radeon/HAWAII_mc2.bin firmware=radeon/HAWAII_mc.bin firmware=radeon/HAWAII_mec.bin firmware=radeon/HAWAII_ce.bin firmware=radeon/HAWAII_me.bin firmware=radeon/HAWAII_pfp.bin firmware=radeon/bonaire_smc.bin firmware=radeon/bonaire_sdma.bin firmware=radeon/bonaire_rlc.bin firmware=radeon/bonaire_mc.bin firmware=radeon/bonaire_mec.bin firmware=radeon/bonaire_ce.bin firmware=radeon/bonaire_me.bin firmware=radeon/bonaire_pfp.bin firmware=radeon/BONAIRE_smc.bin firmware=radeon/BONAIRE_sdma.bin firmware=radeon/BONAIRE_rlc.bin firmware=radeon/BONAIRE_mc2.bin firmware=radeon/BONAIRE_mc.bin firmware=radeon/BONAIRE_mec.bin firmware=radeon/BONAIRE_ce.bin firmware=radeon/BONAIRE_me.bin firmware=radeon/BONAIRE_pfp.bin firmware=radeon/BONAIRE_uvd.bin firmware=radeon/TAHITI_uvd.bin firmware=radeon/SUMO_uvd.bin firmware=radeon/CYPRESS_uvd.bin firmware=radeon/RV710_uvd.bin firmware=radeon/RV770_uvd.bin firmware=radeon/RS780_uvd.bin firmware=radeon/R600_uvd.bin firmware=radeon/BONAIRE_vce.bin firmware=radeon/TAHITI_vce.bin srcversion=33773073AEDF4AF7CC1710B alias=pci:v00001002d000099A4sv*sd*bc*sc*i* alias=pci:v00001002d000099A2sv*sd*bc*sc*i* alias=pci:v00001002d000099A0sv*sd*bc*sc*i* alias=pci:v00001002d0000999Dsv*sd*bc*sc*i* alias=pci:v00001002d0000999Csv*sd*bc*sc*i* alias=pci:v00001002d0000999Bsv*sd*bc*sc*i* alias=pci:v00001002d0000999Asv*sd*bc*sc*i* alias=pci:v00001002d00009999sv*sd*bc*sc*i* alias=pci:v00001002d00009998sv*sd*bc*sc*i* alias=pci:v00001002d00009997sv*sd*bc*sc*i* alias=pci:v00001002d00009996sv*sd*bc*sc*i* alias=pci:v00001002d00009995sv*sd*bc*sc*i* alias=pci:v00001002d00009994sv*sd*bc*sc*i* alias=pci:v00001002d00009993sv*sd*bc*sc*i* alias=pci:v00001002d00009992sv*sd*bc*sc*i* alias=pci:v00001002d00009991sv*sd*bc*sc*i* alias=pci:v00001002d00009990sv*sd*bc*sc*i* alias=pci:v00001002d00009919sv*sd*bc*sc*i* alias=pci:v00001002d00009918sv*sd*bc*sc*i* alias=pci:v00001002d00009917sv*sd*bc*sc*i* alias=pci:v00001002d00009913sv*sd*bc*sc*i* alias=pci:v00001002d00009910sv*sd*bc*sc*i* alias=pci:v00001002d0000990Fsv*sd*bc*sc*i* alias=pci:v00001002d0000990Esv*sd*bc*sc*i* alias=pci:v00001002d0000990Dsv*sd*bc*sc*i* alias=pci:v00001002d0000990Csv*sd*bc*sc*i* alias=pci:v00001002d0000990Bsv*sd*bc*sc*i* alias=pci:v00001002d0000990Asv*sd*bc*sc*i* alias=pci:v00001002d00009909sv*sd*bc*sc*i* alias=pci:v00001002d00009908sv*sd*bc*sc*i* alias=pci:v00001002d00009907sv*sd*bc*sc*i* alias=pci:v00001002d00009906sv*sd*bc*sc*i* alias=pci:v00001002d00009905sv*sd*bc*sc*i* alias=pci:v00001002d00009904sv*sd*bc*sc*i* alias=pci:v00001002d00009903sv*sd*bc*sc*i* alias=pci:v00001002d00009901sv*sd*bc*sc*i* alias=pci:v00001002d00009900sv*sd*bc*sc*i* alias=pci:v00001002d0000985Fsv*sd*bc*sc*i* alias=pci:v00001002d0000985Esv*sd*bc*sc*i* alias=pci:v00001002d0000985Dsv*sd*bc*sc*i* alias=pci:v00001002d0000985Csv*sd*bc*sc*i* alias=pci:v00001002d0000985Bsv*sd*bc*sc*i* alias=pci:v00001002d0000985Asv*sd*bc*sc*i* alias=pci:v00001002d00009859sv*sd*bc*sc*i* alias=pci:v00001002d00009858sv*sd*bc*sc*i* alias=pci:v00001002d00009857sv*sd*bc*sc*i* alias=pci:v00001002d00009856sv*sd*bc*sc*i* alias=pci:v00001002d00009855sv*sd*bc*sc*i* alias=pci:v00001002d00009854sv*sd*bc*sc*i* alias=pci:v00001002d00009853sv*sd*bc*sc*i* alias=pci:v00001002d00009852sv*sd*bc*sc*i* alias=pci:v00001002d00009851sv*sd*bc*sc*i* alias=pci:v00001002d00009850sv*sd*bc*sc*i* alias=pci:v00001002d0000983Fsv*sd*bc*sc*i* alias=pci:v00001002d0000983Esv*sd*bc*sc*i* alias=pci:v00001002d0000983Dsv*sd*bc*sc*i* alias=pci:v00001002d0000983Csv*sd*bc*sc*i* alias=pci:v00001002d0000983Bsv*sd*bc*sc*i* alias=pci:v00001002d0000983Asv*sd*bc*sc*i* alias=pci:v00001002d00009839sv*sd*bc*sc*i* alias=pci:v00001002d00009838sv*sd*bc*sc*i* alias=pci:v00001002d00009837sv*sd*bc*sc*i* alias=pci:v00001002d00009836sv*sd*bc*sc*i* alias=pci:v00001002d00009835sv*sd*bc*sc*i* alias=pci:v00001002d00009834sv*sd*bc*sc*i* alias=pci:v00001002d00009833sv*sd*bc*sc*i* alias=pci:v00001002d00009832sv*sd*bc*sc*i* alias=pci:v00001002d00009831sv*sd*bc*sc*i* alias=pci:v00001002d00009830sv*sd*bc*sc*i* alias=pci:v00001002d0000980Asv*sd*bc*sc*i* alias=pci:v00001002d00009809sv*sd*bc*sc*i* alias=pci:v00001002d00009808sv*sd*bc*sc*i* alias=pci:v00001002d00009807sv*sd*bc*sc*i* alias=pci:v00001002d00009806sv*sd*bc*sc*i* alias=pci:v00001002d00009805sv*sd*bc*sc*i* alias=pci:v00001002d00009804sv*sd*bc*sc*i* alias=pci:v00001002d00009803sv*sd*bc*sc*i* alias=pci:v00001002d00009802sv*sd*bc*sc*i* alias=pci:v00001002d00009715sv*sd*bc*sc*i* alias=pci:v00001002d00009714sv*sd*bc*sc*i* alias=pci:v00001002d00009713sv*sd*bc*sc*i* alias=pci:v00001002d00009712sv*sd*bc*sc*i* alias=pci:v00001002d00009711sv*sd*bc*sc*i* alias=pci:v00001002d00009710sv*sd*bc*sc*i* alias=pci:v00001002d0000964Fsv*sd*bc*sc*i* alias=pci:v00001002d0000964Esv*sd*bc*sc*i* alias=pci:v00001002d0000964Csv*sd*bc*sc*i* alias=pci:v00001002d0000964Bsv*sd*bc*sc*i* alias=pci:v00001002d0000964Asv*sd*bc*sc*i* alias=pci:v00001002d00009649sv*sd*bc*sc*i* alias=pci:v00001002d00009648sv*sd*bc*sc*i* alias=pci:v00001002d00009647sv*sd*bc*sc*i* alias=pci:v00001002d00009645sv*sd*bc*sc*i* alias=pci:v00001002d00009644sv*sd*bc*sc*i* alias=pci:v00001002d00009643sv*sd*bc*sc*i* alias=pci:v00001002d00009642sv*sd*bc*sc*i* alias=pci:v00001002d00009641sv*sd*bc*sc*i* alias=pci:v00001002d00009640sv*sd*bc*sc*i* alias=pci:v00001002d00009616sv*sd*bc*sc*i* alias=pci:v00001002d00009615sv*sd*bc*sc*i* alias=pci:v00001002d00009614sv*sd*bc*sc*i* alias=pci:v00001002d00009613sv*sd*bc*sc*i* alias=pci:v00001002d00009612sv*sd*bc*sc*i* alias=pci:v00001002d00009611sv*sd*bc*sc*i* alias=pci:v00001002d00009610sv*sd*bc*sc*i* alias=pci:v00001002d000095CFsv*sd*bc*sc*i* alias=pci:v00001002d000095CEsv*sd*bc*sc*i* alias=pci:v00001002d000095CDsv*sd*bc*sc*i* alias=pci:v00001002d000095CCsv*sd*bc*sc*i* alias=pci:v00001002d000095C9sv*sd*bc*sc*i* alias=pci:v00001002d000095C7sv*sd*bc*sc*i* alias=pci:v00001002d000095C6sv*sd*bc*sc*i* alias=pci:v00001002d000095C5sv*sd*bc*sc*i* alias=pci:v00001002d000095C4sv*sd*bc*sc*i* alias=pci:v00001002d000095C2sv*sd*bc*sc*i* alias=pci:v00001002d000095C0sv*sd*bc*sc*i* alias=pci:v00001002d0000959Bsv*sd*bc*sc*i* alias=pci:v00001002d00009599sv*sd*bc*sc*i* alias=pci:v00001002d00009598sv*sd*bc*sc*i* alias=pci:v00001002d00009597sv*sd*bc*sc*i* alias=pci:v00001002d00009596sv*sd*bc*sc*i* alias=pci:v00001002d00009595sv*sd*bc*sc*i* alias=pci:v00001002d00009593sv*sd*bc*sc*i* alias=pci:v00001002d00009591sv*sd*bc*sc*i* alias=pci:v00001002d00009590sv*sd*bc*sc*i* alias=pci:v00001002d0000958Fsv*sd*bc*sc*i* alias=pci:v00001002d0000958Esv*sd*bc*sc*i* alias=pci:v00001002d0000958Dsv*sd*bc*sc*i* alias=pci:v00001002d0000958Csv*sd*bc*sc*i* alias=pci:v00001002d0000958Bsv*sd*bc*sc*i* alias=pci:v00001002d0000958Asv*sd*bc*sc*i* alias=pci:v00001002d00009589sv*sd*bc*sc*i* alias=pci:v00001002d00009588sv*sd*bc*sc*i* alias=pci:v00001002d00009587sv*sd*bc*sc*i* alias=pci:v00001002d00009586sv*sd*bc*sc*i* alias=pci:v00001002d00009583sv*sd*bc*sc*i* alias=pci:v00001002d00009581sv*sd*bc*sc*i* alias=pci:v00001002d00009580sv*sd*bc*sc*i* alias=pci:v00001002d0000955Fsv*sd*bc*sc*i* alias=pci:v00001002d00009557sv*sd*bc*sc*i* alias=pci:v00001002d00009555sv*sd*bc*sc*i* alias=pci:v00001002d00009553sv*sd*bc*sc*i* alias=pci:v00001002d00009552sv*sd*bc*sc*i* alias=pci:v00001002d0000954Fsv*sd*bc*sc*i* alias=pci:v00001002d0000954Esv*sd*bc*sc*i* alias=pci:v00001002d00009542sv*sd*bc*sc*i* alias=pci:v00001002d00009541sv*sd*bc*sc*i* alias=pci:v00001002d00009540sv*sd*bc*sc*i* alias=pci:v00001002d00009519sv*sd*bc*sc*i* alias=pci:v00001002d00009517sv*sd*bc*sc*i* alias=pci:v00001002d00009515sv*sd*bc*sc*i* alias=pci:v00001002d00009511sv*sd*bc*sc*i* alias=pci:v00001002d0000950Fsv*sd*bc*sc*i* alias=pci:v00001002d00009509sv*sd*bc*sc*i* alias=pci:v00001002d00009508sv*sd*bc*sc*i* alias=pci:v00001002d00009507sv*sd*bc*sc*i* alias=pci:v00001002d00009506sv*sd*bc*sc*i* alias=pci:v00001002d00009505sv*sd*bc*sc*i* alias=pci:v00001002d00009504sv*sd*bc*sc*i* alias=pci:v00001002d00009501sv*sd*bc*sc*i* alias=pci:v00001002d00009500sv*sd*bc*sc*i* alias=pci:v00001002d000094CDsv*sd*bc*sc*i* alias=pci:v00001002d000094CCsv*sd*bc*sc*i* alias=pci:v00001002d000094CBsv*sd*bc*sc*i* alias=pci:v00001002d000094C9sv*sd*bc*sc*i* alias=pci:v00001002d000094C8sv*sd*bc*sc*i* alias=pci:v00001002d000094C7sv*sd*bc*sc*i* alias=pci:v00001002d000094C6sv*sd*bc*sc*i* alias=pci:v00001002d000094C5sv*sd*bc*sc*i* alias=pci:v00001002d000094C4sv*sd*bc*sc*i* alias=pci:v00001002d000094C3sv*sd*bc*sc*i* alias=pci:v00001002d000094C1sv*sd*bc*sc*i* alias=pci:v00001002d000094C0sv*sd*bc*sc*i* alias=pci:v00001002d0000949Fsv*sd*bc*sc*i* alias=pci:v00001002d0000949Esv*sd*bc*sc*i* alias=pci:v00001002d0000949Csv*sd*bc*sc*i* alias=pci:v00001002d00009498sv*sd*bc*sc*i* alias=pci:v00001002d00009495sv*sd*bc*sc*i* alias=pci:v00001002d00009491sv*sd*bc*sc*i* alias=pci:v00001002d00009490sv*sd*bc*sc*i* alias=pci:v00001002d0000948Fsv*sd*bc*sc*i* alias=pci:v00001002d0000948Asv*sd*bc*sc*i* alias=pci:v00001002d00009489sv*sd*bc*sc*i* alias=pci:v00001002d00009488sv*sd*bc*sc*i* alias=pci:v00001002d00009487sv*sd*bc*sc*i* alias=pci:v00001002d00009480sv*sd*bc*sc*i* alias=pci:v00001002d0000947Bsv*sd*bc*sc*i* alias=pci:v00001002d0000947Asv*sd*bc*sc*i* alias=pci:v00001002d0000946Bsv*sd*bc*sc*i* alias=pci:v00001002d0000946Asv*sd*bc*sc*i* alias=pci:v00001002d00009462sv*sd*bc*sc*i* alias=pci:v00001002d00009460sv*sd*bc*sc*i* alias=pci:v00001002d0000945Esv*sd*bc*sc*i* alias=pci:v00001002d0000945Bsv*sd*bc*sc*i* alias=pci:v00001002d0000945Asv*sd*bc*sc*i* alias=pci:v00001002d00009456sv*sd*bc*sc*i* alias=pci:v00001002d00009452sv*sd*bc*sc*i* alias=pci:v00001002d00009450sv*sd*bc*sc*i* alias=pci:v00001002d0000944Esv*sd*bc*sc*i* alias=pci:v00001002d0000944Csv*sd*bc*sc*i* alias=pci:v00001002d0000944Bsv*sd*bc*sc*i* alias=pci:v00001002d0000944Asv*sd*bc*sc*i* alias=pci:v00001002d00009446sv*sd*bc*sc*i* alias=pci:v00001002d00009444sv*sd*bc*sc*i* alias=pci:v00001002d00009443sv*sd*bc*sc*i* alias=pci:v00001002d00009442sv*sd*bc*sc*i* alias=pci:v00001002d00009441sv*sd*bc*sc*i* alias=pci:v00001002d00009440sv*sd*bc*sc*i* alias=pci:v00001002d000094B9sv*sd*bc*sc*i* alias=pci:v00001002d000094B5sv*sd*bc*sc*i* alias=pci:v00001002d000094B4sv*sd*bc*sc*i* alias=pci:v00001002d000094B3sv*sd*bc*sc*i* alias=pci:v00001002d000094B1sv*sd*bc*sc*i* alias=pci:v00001002d000094A3sv*sd*bc*sc*i* alias=pci:v00001002d000094A1sv*sd*bc*sc*i* alias=pci:v00001002d000094A0sv*sd*bc*sc*i* alias=pci:v00001002d0000940Fsv*sd*bc*sc*i* alias=pci:v00001002d0000940Bsv*sd*bc*sc*i* alias=pci:v00001002d0000940Asv*sd*bc*sc*i* alias=pci:v00001002d00009405sv*sd*bc*sc*i* alias=pci:v00001002d00009403sv*sd*bc*sc*i* alias=pci:v00001002d00009402sv*sd*bc*sc*i* alias=pci:v00001002d00009401sv*sd*bc*sc*i* alias=pci:v00001002d00009400sv*sd*bc*sc*i* alias=pci:v00001002d0000796Fsv*sd*bc*sc*i* alias=pci:v00001002d0000796Esv*sd*bc*sc*i* alias=pci:v00001002d0000796Dsv*sd*bc*sc*i* alias=pci:v00001002d0000796Csv*sd*bc*sc*i* alias=pci:v00001002d00007942sv*sd*bc*sc*i* alias=pci:v00001002d00007941sv*sd*bc*sc*i* alias=pci:v00001002d0000793Fsv*sd*bc*sc*i* alias=pci:v00001002d0000791Fsv*sd*bc*sc*i* alias=pci:v00001002d0000791Esv*sd*bc*sc*i* alias=pci:v00001002d00007835sv*sd*bc*sc*i* alias=pci:v00001002d00007834sv*sd*bc*sc*i* alias=pci:v00001002d00007297sv*sd*bc*sc*i* alias=pci:v00001002d00007293sv*sd*bc*sc*i* alias=pci:v00001002d00007291sv*sd*bc*sc*i* alias=pci:v00001002d00007290sv*sd*bc*sc*i* alias=pci:v00001002d0000728Csv*sd*bc*sc*i* alias=pci:v00001002d0000728Bsv*sd*bc*sc*i* alias=pci:v00001002d00007289sv*sd*bc*sc*i* alias=pci:v00001002d00007288sv*sd*bc*sc*i* alias=pci:v00001002d00007287sv*sd*bc*sc*i* alias=pci:v00001002d00007284sv*sd*bc*sc*i* alias=pci:v00001002d00007283sv*sd*bc*sc*i* alias=pci:v00001002d00007281sv*sd*bc*sc*i* alias=pci:v00001002d00007280sv*sd*bc*sc*i* alias=pci:v00001002d0000724Fsv*sd*bc*sc*i* alias=pci:v00001002d0000724Esv*sd*bc*sc*i* alias=pci:v00001002d0000724Dsv*sd*bc*sc*i* alias=pci:v00001002d0000724Csv*sd*bc*sc*i* alias=pci:v00001002d0000724Bsv*sd*bc*sc*i* alias=pci:v00001002d0000724Asv*sd*bc*sc*i* alias=pci:v00001002d00007249sv*sd*bc*sc*i* alias=pci:v00001002d00007248sv*sd*bc*sc*i* alias=pci:v00001002d00007247sv*sd*bc*sc*i* alias=pci:v00001002d00007246sv*sd*bc*sc*i* alias=pci:v00001002d00007245sv*sd*bc*sc*i* alias=pci:v00001002d00007244sv*sd*bc*sc*i* alias=pci:v00001002d00007243sv*sd*bc*sc*i* alias=pci:v00001002d00007240sv*sd*bc*sc*i* alias=pci:v00001002d00007211sv*sd*bc*sc*i* alias=pci:v00001002d00007210sv*sd*bc*sc*i* alias=pci:v00001002d00007200sv*sd*bc*sc*i* alias=pci:v00001002d000071DEsv*sd*bc*sc*i* alias=pci:v00001002d000071DAsv*sd*bc*sc*i* alias=pci:v00001002d000071D6sv*sd*bc*sc*i* alias=pci:v00001002d000071D5sv*sd*bc*sc*i* alias=pci:v00001002d000071D4sv*sd*bc*sc*i* alias=pci:v00001002d000071D2sv*sd*bc*sc*i* alias=pci:v00001002d000071CEsv*sd*bc*sc*i* alias=pci:v00001002d000071CDsv*sd*bc*sc*i* alias=pci:v00001002d000071C7sv*sd*bc*sc*i* alias=pci:v00001002d000071C6sv*sd*bc*sc*i* alias=pci:v00001002d000071C5sv*sd*bc*sc*i* alias=pci:v00001002d000071C4sv*sd*bc*sc*i* alias=pci:v00001002d000071C3sv*sd*bc*sc*i* alias=pci:v00001002d000071C2sv*sd*bc*sc*i* alias=pci:v00001002d000071C1sv*sd*bc*sc*i* alias=pci:v00001002d000071C0sv*sd*bc*sc*i* alias=pci:v00001002d0000719Fsv*sd*bc*sc*i* alias=pci:v00001002d0000719Bsv*sd*bc*sc*i* alias=pci:v00001002d00007196sv*sd*bc*sc*i* alias=pci:v00001002d00007193sv*sd*bc*sc*i* alias=pci:v00001002d0000718Fsv*sd*bc*sc*i* alias=pci:v00001002d0000718Dsv*sd*bc*sc*i* alias=pci:v00001002d0000718Csv*sd*bc*sc*i* alias=pci:v00001002d0000718Bsv*sd*bc*sc*i* alias=pci:v00001002d0000718Asv*sd*bc*sc*i* alias=pci:v00001002d00007188sv*sd*bc*sc*i* alias=pci:v00001002d00007187sv*sd*bc*sc*i* alias=pci:v00001002d00007186sv*sd*bc*sc*i* alias=pci:v00001002d00007183sv*sd*bc*sc*i* alias=pci:v00001002d00007181sv*sd*bc*sc*i* alias=pci:v00001002d00007180sv*sd*bc*sc*i* alias=pci:v00001002d0000715Fsv*sd*bc*sc*i* alias=pci:v00001002d0000715Esv*sd*bc*sc*i* alias=pci:v00001002d00007153sv*sd*bc*sc*i* alias=pci:v00001002d00007152sv*sd*bc*sc*i* alias=pci:v00001002d00007151sv*sd*bc*sc*i* alias=pci:v00001002d0000714Fsv*sd*bc*sc*i* alias=pci:v00001002d0000714Esv*sd*bc*sc*i* alias=pci:v00001002d0000714Dsv*sd*bc*sc*i* alias=pci:v00001002d0000714Csv*sd*bc*sc*i* alias=pci:v00001002d0000714Bsv*sd*bc*sc*i* alias=pci:v00001002d0000714Asv*sd*bc*sc*i* alias=pci:v00001002d00007149sv*sd*bc*sc*i* alias=pci:v00001002d00007147sv*sd*bc*sc*i* alias=pci:v00001002d00007146sv*sd*bc*sc*i* alias=pci:v00001002d00007145sv*sd*bc*sc*i* alias=pci:v00001002d00007144sv*sd*bc*sc*i* alias=pci:v00001002d00007143sv*sd*bc*sc*i* alias=pci:v00001002d00007142sv*sd*bc*sc*i* alias=pci:v00001002d00007141sv*sd*bc*sc*i* alias=pci:v00001002d00007140sv*sd*bc*sc*i* alias=pci:v00001002d0000710Fsv*sd*bc*sc*i* alias=pci:v00001002d0000710Esv*sd*bc*sc*i* alias=pci:v00001002d0000710Csv*sd*bc*sc*i* alias=pci:v00001002d0000710Bsv*sd*bc*sc*i* alias=pci:v00001002d0000710Asv*sd*bc*sc*i* alias=pci:v00001002d00007109sv*sd*bc*sc*i* alias=pci:v00001002d00007108sv*sd*bc*sc*i* alias=pci:v00001002d00007106sv*sd*bc*sc*i* alias=pci:v00001002d00007105sv*sd*bc*sc*i* alias=pci:v00001002d00007104sv*sd*bc*sc*i* alias=pci:v00001002d00007103sv*sd*bc*sc*i* alias=pci:v00001002d00007102sv*sd*bc*sc*i* alias=pci:v00001002d00007101sv*sd*bc*sc*i* alias=pci:v00001002d00007100sv*sd*bc*sc*i* alias=pci:v00001002d000068FEsv*sd*bc*sc*i* alias=pci:v00001002d000068FAsv*sd*bc*sc*i* alias=pci:v00001002d000068F9sv*sd*bc*sc*i* alias=pci:v00001002d000068F8sv*sd*bc*sc*i* alias=pci:v00001002d000068F2sv*sd*bc*sc*i* alias=pci:v00001002d000068F1sv*sd*bc*sc*i* alias=pci:v00001002d000068E9sv*sd*bc*sc*i* alias=pci:v00001002d000068E8sv*sd*bc*sc*i* alias=pci:v00001002d000068E5sv*sd*bc*sc*i* alias=pci:v00001002d000068E4sv*sd*bc*sc*i* alias=pci:v00001002d000068E1sv*sd*bc*sc*i* alias=pci:v00001002d000068E0sv*sd*bc*sc*i* alias=pci:v00001002d000068DEsv*sd*bc*sc*i* alias=pci:v00001002d000068DAsv*sd*bc*sc*i* alias=pci:v00001002d000068D9sv*sd*bc*sc*i* alias=pci:v00001002d000068D8sv*sd*bc*sc*i* alias=pci:v00001002d000068C9sv*sd*bc*sc*i* alias=pci:v00001002d000068C8sv*sd*bc*sc*i* alias=pci:v00001002d000068C7sv*sd*bc*sc*i* alias=pci:v00001002d000068C1sv*sd*bc*sc*i* alias=pci:v00001002d000068C0sv*sd*bc*sc*i* alias=pci:v00001002d000068BFsv*sd*bc*sc*i* alias=pci:v00001002d000068BEsv*sd*bc*sc*i* alias=pci:v00001002d000068BAsv*sd*bc*sc*i* alias=pci:v00001002d000068B9sv*sd*bc*sc*i* alias=pci:v00001002d000068B8sv*sd*bc*sc*i* alias=pci:v00001002d000068B0sv*sd*bc*sc*i* alias=pci:v00001002d000068A9sv*sd*bc*sc*i* alias=pci:v00001002d000068A8sv*sd*bc*sc*i* alias=pci:v00001002d000068A1sv*sd*bc*sc*i* alias=pci:v00001002d000068A0sv*sd*bc*sc*i* alias=pci:v00001002d0000689Esv*sd*bc*sc*i* alias=pci:v00001002d0000689Dsv*sd*bc*sc*i* alias=pci:v00001002d0000689Csv*sd*bc*sc*i* alias=pci:v00001002d0000689Bsv*sd*bc*sc*i* alias=pci:v00001002d00006899sv*sd*bc*sc*i* alias=pci:v00001002d00006898sv*sd*bc*sc*i* alias=pci:v00001002d0000688Dsv*sd*bc*sc*i* alias=pci:v00001002d0000688Csv*sd*bc*sc*i* alias=pci:v00001002d0000688Asv*sd*bc*sc*i* alias=pci:v00001002d00006889sv*sd*bc*sc*i* alias=pci:v00001002d00006888sv*sd*bc*sc*i* alias=pci:v00001002d00006880sv*sd*bc*sc*i* alias=pci:v00001002d00006859sv*sd*bc*sc*i* alias=pci:v00001002d00006858sv*sd*bc*sc*i* alias=pci:v00001002d00006850sv*sd*bc*sc*i* alias=pci:v00001002d0000684Csv*sd*bc*sc*i* alias=pci:v00001002d00006849sv*sd*bc*sc*i* alias=pci:v00001002d00006843sv*sd*bc*sc*i* alias=pci:v00001002d00006842sv*sd*bc*sc*i* alias=pci:v00001002d00006841sv*sd*bc*sc*i* alias=pci:v00001002d00006840sv*sd*bc*sc*i* alias=pci:v00001002d0000683Fsv*sd*bc*sc*i* alias=pci:v00001002d0000683Dsv*sd*bc*sc*i* alias=pci:v00001002d0000683Bsv*sd*bc*sc*i* alias=pci:v00001002d00006839sv*sd*bc*sc*i* alias=pci:v00001002d00006838sv*sd*bc*sc*i* alias=pci:v00001002d00006837sv*sd*bc*sc*i* alias=pci:v00001002d00006835sv*sd*bc*sc*i* alias=pci:v00001002d00006831sv*sd*bc*sc*i* alias=pci:v00001002d00006830sv*sd*bc*sc*i* alias=pci:v00001002d0000682Fsv*sd*bc*sc*i* alias=pci:v00001002d0000682Dsv*sd*bc*sc*i* alias=pci:v00001002d0000682Csv*sd*bc*sc*i* alias=pci:v00001002d0000682Bsv*sd*bc*sc*i* alias=pci:v00001002d0000682Asv*sd*bc*sc*i* alias=pci:v00001002d00006829sv*sd*bc*sc*i* alias=pci:v00001002d00006828sv*sd*bc*sc*i* alias=pci:v00001002d00006827sv*sd*bc*sc*i* alias=pci:v00001002d00006826sv*sd*bc*sc*i* alias=pci:v00001002d00006825sv*sd*bc*sc*i* alias=pci:v00001002d00006824sv*sd*bc*sc*i* alias=pci:v00001002d00006823sv*sd*bc*sc*i* alias=pci:v00001002d00006822sv*sd*bc*sc*i* alias=pci:v00001002d00006821sv*sd*bc*sc*i* alias=pci:v00001002d00006820sv*sd*bc*sc*i* alias=pci:v00001002d00006819sv*sd*bc*sc*i* alias=pci:v00001002d00006818sv*sd*bc*sc*i* alias=pci:v00001002d00006817sv*sd*bc*sc*i* alias=pci:v00001002d00006816sv*sd*bc*sc*i* alias=pci:v00001002d00006811sv*sd*bc*sc*i* alias=pci:v00001002d00006810sv*sd*bc*sc*i* alias=pci:v00001002d00006809sv*sd*bc*sc*i* alias=pci:v00001002d00006808sv*sd*bc*sc*i* alias=pci:v00001002d00006806sv*sd*bc*sc*i* alias=pci:v00001002d00006802sv*sd*bc*sc*i* alias=pci:v00001002d00006801sv*sd*bc*sc*i* alias=pci:v00001002d00006800sv*sd*bc*sc*i* alias=pci:v00001002d000067BEsv*sd*bc*sc*i* alias=pci:v00001002d000067BAsv*sd*bc*sc*i* alias=pci:v00001002d000067B9sv*sd*bc*sc*i* alias=pci:v00001002d000067B8sv*sd*bc*sc*i* alias=pci:v00001002d000067B1sv*sd*bc*sc*i* alias=pci:v00001002d000067B0sv*sd*bc*sc*i* alias=pci:v00001002d000067AAsv*sd*bc*sc*i* alias=pci:v00001002d000067A9sv*sd*bc*sc*i* alias=pci:v00001002d000067A8sv*sd*bc*sc*i* alias=pci:v00001002d000067A2sv*sd*bc*sc*i* alias=pci:v00001002d000067A1sv*sd*bc*sc*i* alias=pci:v00001002d000067A0sv*sd*bc*sc*i* alias=pci:v00001002d0000679Fsv*sd*bc*sc*i* alias=pci:v00001002d0000679Esv*sd*bc*sc*i* alias=pci:v00001002d0000679Bsv*sd*bc*sc*i* alias=pci:v00001002d0000679Asv*sd*bc*sc*i* alias=pci:v00001002d00006799sv*sd*bc*sc*i* alias=pci:v00001002d00006798sv*sd*bc*sc*i* alias=pci:v00001002d00006792sv*sd*bc*sc*i* alias=pci:v00001002d00006791sv*sd*bc*sc*i* alias=pci:v00001002d00006790sv*sd*bc*sc*i* alias=pci:v00001002d0000678Asv*sd*bc*sc*i* alias=pci:v00001002d00006788sv*sd*bc*sc*i* alias=pci:v00001002d00006784sv*sd*bc*sc*i* alias=pci:v00001002d00006780sv*sd*bc*sc*i* alias=pci:v00001002d0000677Bsv*sd*bc*sc*i* alias=pci:v00001002d00006779sv*sd*bc*sc*i* alias=pci:v00001002d00006778sv*sd*bc*sc*i* alias=pci:v00001002d00006772sv*sd*bc*sc*i* alias=pci:v00001002d00006771sv*sd*bc*sc*i* alias=pci:v00001002d00006770sv*sd*bc*sc*i* alias=pci:v00001002d00006768sv*sd*bc*sc*i* alias=pci:v00001002d00006767sv*sd*bc*sc*i* alias=pci:v00001002d00006766sv*sd*bc*sc*i* alias=pci:v00001002d00006765sv*sd*bc*sc*i* alias=pci:v00001002d00006764sv*sd*bc*sc*i* alias=pci:v00001002d00006763sv*sd*bc*sc*i* alias=pci:v00001002d00006762sv*sd*bc*sc*i* alias=pci:v00001002d00006761sv*sd*bc*sc*i* alias=pci:v00001002d00006760sv*sd*bc*sc*i* alias=pci:v00001002d0000675Fsv*sd*bc*sc*i* alias=pci:v00001002d0000675Dsv*sd*bc*sc*i* alias=pci:v00001002d0000675Bsv*sd*bc*sc*i* alias=pci:v00001002d00006759sv*sd*bc*sc*i* alias=pci:v00001002d00006758sv*sd*bc*sc*i* alias=pci:v00001002d00006751sv*sd*bc*sc*i* alias=pci:v00001002d00006750sv*sd*bc*sc*i* alias=pci:v00001002d0000674Asv*sd*bc*sc*i* alias=pci:v00001002d00006749sv*sd*bc*sc*i* alias=pci:v00001002d00006748sv*sd*bc*sc*i* alias=pci:v00001002d00006747sv*sd*bc*sc*i* alias=pci:v00001002d00006746sv*sd*bc*sc*i* alias=pci:v00001002d00006745sv*sd*bc*sc*i* alias=pci:v00001002d00006744sv*sd*bc*sc*i* alias=pci:v00001002d00006743sv*sd*bc*sc*i* alias=pci:v00001002d00006742sv*sd*bc*sc*i* alias=pci:v00001002d00006741sv*sd*bc*sc*i* alias=pci:v00001002d00006740sv*sd*bc*sc*i* alias=pci:v00001002d0000673Esv*sd*bc*sc*i* alias=pci:v00001002d00006739sv*sd*bc*sc*i* alias=pci:v00001002d00006738sv*sd*bc*sc*i* alias=pci:v00001002d00006729sv*sd*bc*sc*i* alias=pci:v00001002d00006728sv*sd*bc*sc*i* alias=pci:v00001002d00006727sv*sd*bc*sc*i* alias=pci:v00001002d00006726sv*sd*bc*sc*i* alias=pci:v00001002d00006725sv*sd*bc*sc*i* alias=pci:v00001002d00006724sv*sd*bc*sc*i* alias=pci:v00001002d00006723sv*sd*bc*sc*i* alias=pci:v00001002d00006722sv*sd*bc*sc*i* alias=pci:v00001002d00006721sv*sd*bc*sc*i* alias=pci:v00001002d00006720sv*sd*bc*sc*i* alias=pci:v00001002d0000671Fsv*sd*bc*sc*i* alias=pci:v00001002d0000671Dsv*sd*bc*sc*i* alias=pci:v00001002d0000671Csv*sd*bc*sc*i* alias=pci:v00001002d00006719sv*sd*bc*sc*i* alias=pci:v00001002d00006718sv*sd*bc*sc*i* alias=pci:v00001002d00006709sv*sd*bc*sc*i* alias=pci:v00001002d00006708sv*sd*bc*sc*i* alias=pci:v00001002d00006707sv*sd*bc*sc*i* alias=pci:v00001002d00006706sv*sd*bc*sc*i* alias=pci:v00001002d00006705sv*sd*bc*sc*i* alias=pci:v00001002d00006704sv*sd*bc*sc*i* alias=pci:v00001002d00006703sv*sd*bc*sc*i* alias=pci:v00001002d00006702sv*sd*bc*sc*i* alias=pci:v00001002d00006701sv*sd*bc*sc*i* alias=pci:v00001002d00006700sv*sd*bc*sc*i* alias=pci:v00001002d0000666Fsv*sd*bc*sc*i* alias=pci:v00001002d00006667sv*sd*bc*sc*i* alias=pci:v00001002d00006665sv*sd*bc*sc*i* alias=pci:v00001002d00006664sv*sd*bc*sc*i* alias=pci:v00001002d00006663sv*sd*bc*sc*i* alias=pci:v00001002d00006660sv*sd*bc*sc*i* alias=pci:v00001002d0000665Fsv*sd*bc*sc*i* alias=pci:v00001002d0000665Dsv*sd*bc*sc*i* alias=pci:v00001002d0000665Csv*sd*bc*sc*i* alias=pci:v00001002d00006658sv*sd*bc*sc*i* alias=pci:v00001002d00006651sv*sd*bc*sc*i* alias=pci:v00001002d00006650sv*sd*bc*sc*i* alias=pci:v00001002d00006649sv*sd*bc*sc*i* alias=pci:v00001002d00006647sv*sd*bc*sc*i* alias=pci:v00001002d00006646sv*sd*bc*sc*i* alias=pci:v00001002d00006641sv*sd*bc*sc*i* alias=pci:v00001002d00006640sv*sd*bc*sc*i* alias=pci:v00001002d00006631sv*sd*bc*sc*i* alias=pci:v00001002d00006623sv*sd*bc*sc*i* alias=pci:v00001002d00006621sv*sd*bc*sc*i* alias=pci:v00001002d00006620sv*sd*bc*sc*i* alias=pci:v00001002d00006617sv*sd*bc*sc*i* alias=pci:v00001002d00006613sv*sd*bc*sc*i* alias=pci:v00001002d00006611sv*sd*bc*sc*i* alias=pci:v00001002d00006610sv*sd*bc*sc*i* alias=pci:v00001002d00006608sv*sd*bc*sc*i* alias=pci:v00001002d00006607sv*sd*bc*sc*i* alias=pci:v00001002d00006606sv*sd*bc*sc*i* alias=pci:v00001002d00006605sv*sd*bc*sc*i* alias=pci:v00001002d00006604sv*sd*bc*sc*i* alias=pci:v00001002d00006603sv*sd*bc*sc*i* alias=pci:v00001002d00006602sv*sd*bc*sc*i* alias=pci:v00001002d00006601sv*sd*bc*sc*i* alias=pci:v00001002d00006600sv*sd*bc*sc*i* alias=pci:v00001002d00005E4Fsv*sd*bc*sc*i* alias=pci:v00001002d00005E4Dsv*sd*bc*sc*i* alias=pci:v00001002d00005E4Csv*sd*bc*sc*i* alias=pci:v00001002d00005E4Bsv*sd*bc*sc*i* alias=pci:v00001002d00005E4Asv*sd*bc*sc*i* alias=pci:v00001002d00005E48sv*sd*bc*sc*i* alias=pci:v00001002d00005D57sv*sd*bc*sc*i* alias=pci:v00001002d00005D52sv*sd*bc*sc*i* alias=pci:v00001002d00005D50sv*sd*bc*sc*i* alias=pci:v00001002d00005D4Fsv*sd*bc*sc*i* alias=pci:v00001002d00005D4Esv*sd*bc*sc*i* alias=pci:v00001002d00005D4Dsv*sd*bc*sc*i* alias=pci:v00001002d00005D4Csv*sd*bc*sc*i* alias=pci:v00001002d00005D4Asv*sd*bc*sc*i* alias=pci:v00001002d00005D49sv*sd*bc*sc*i* alias=pci:v00001002d00005D48sv*sd*bc*sc*i* alias=pci:v00001002d00005C63sv*sd*bc*sc*i* alias=pci:v00001002d00005C61sv*sd*bc*sc*i* alias=pci:v00001002d00005B65sv*sd*bc*sc*i* alias=pci:v00001002d00005B64sv*sd*bc*sc*i* alias=pci:v00001002d00005B63sv*sd*bc*sc*i* alias=pci:v00001002d00005B62sv*sd*bc*sc*i* alias=pci:v00001002d00005B60sv*sd*bc*sc*i* alias=pci:v00001002d00005A62sv*sd*bc*sc*i* alias=pci:v00001002d00005A61sv*sd*bc*sc*i* alias=pci:v00001002d00005A42sv*sd*bc*sc*i* alias=pci:v00001002d00005A41sv*sd*bc*sc*i* alias=pci:v00001002d00005969sv*sd*bc*sc*i* alias=pci:v00001002d00005965sv*sd*bc*sc*i* alias=pci:v00001002d00005964sv*sd*bc*sc*i* alias=pci:v00001002d00005962sv*sd*bc*sc*i* alias=pci:v00001002d00005961sv*sd*bc*sc*i* alias=pci:v00001002d00005960sv*sd*bc*sc*i* alias=pci:v00001002d00005975sv*sd*bc*sc*i* alias=pci:v00001002d00005974sv*sd*bc*sc*i* alias=pci:v00001002d00005955sv*sd*bc*sc*i* alias=pci:v00001002d00005954sv*sd*bc*sc*i* alias=pci:v00001002d00005835sv*sd*bc*sc*i* alias=pci:v00001002d00005834sv*sd*bc*sc*i* alias=pci:v00001002d00005657sv*sd*bc*sc*i* alias=pci:v00001002d00005653sv*sd*bc*sc*i* alias=pci:v00001002d00005652sv*sd*bc*sc*i* alias=pci:v00001002d0000564Fsv*sd*bc*sc*i* alias=pci:v00001002d0000564Bsv*sd*bc*sc*i* alias=pci:v00001002d0000564Asv*sd*bc*sc*i* alias=pci:v00001002d00005554sv*sd*bc*sc*i* alias=pci:v00001002d00005552sv*sd*bc*sc*i* alias=pci:v00001002d00005551sv*sd*bc*sc*i* alias=pci:v00001002d00005550sv*sd*bc*sc*i* alias=pci:v00001002d0000554Fsv*sd*bc*sc*i* alias=pci:v00001002d0000554Esv*sd*bc*sc*i* alias=pci:v00001002d0000554Dsv*sd*bc*sc*i* alias=pci:v00001002d0000554Csv*sd*bc*sc*i* alias=pci:v00001002d0000554Bsv*sd*bc*sc*i* alias=pci:v00001002d0000554Asv*sd*bc*sc*i* alias=pci:v00001002d00005549sv*sd*bc*sc*i* alias=pci:v00001002d00005548sv*sd*bc*sc*i* alias=pci:v00001002d00005464sv*sd*bc*sc*i* alias=pci:v00001002d00005462sv*sd*bc*sc*i* alias=pci:v00001002d00005460sv*sd*bc*sc*i* alias=pci:v00001002d0000515Esv*sd*bc*sc*i* alias=pci:v00001002d0000515Asv*sd*bc*sc*i* alias=pci:v00001002d00005159sv*sd*bc*sc*i* alias=pci:v00001002d00005158sv*sd*bc*sc*i* alias=pci:v00001002d00005157sv*sd*bc*sc*i* alias=pci:v00001002d0000514Dsv*sd*bc*sc*i* alias=pci:v00001002d0000514Csv*sd*bc*sc*i* alias=pci:v00001002d00005148sv*sd*bc*sc*i* alias=pci:v00001002d00005147sv*sd*bc*sc*i* alias=pci:v00001002d00005146sv*sd*bc*sc*i* alias=pci:v00001002d00005145sv*sd*bc*sc*i* alias=pci:v00001002d00005144sv*sd*bc*sc*i* alias=pci:v00001002d00004E56sv*sd*bc*sc*i* alias=pci:v00001002d00004E54sv*sd*bc*sc*i* alias=pci:v00001002d00004E53sv*sd*bc*sc*i* alias=pci:v00001002d00004E52sv*sd*bc*sc*i* alias=pci:v00001002d00004E51sv*sd*bc*sc*i* alias=pci:v00001002d00004E50sv*sd*bc*sc*i* alias=pci:v00001002d00004E4Bsv*sd*bc*sc*i* alias=pci:v00001002d00004E4Asv*sd*bc*sc*i* alias=pci:v00001002d00004E49sv*sd*bc*sc*i* alias=pci:v00001002d00004E48sv*sd*bc*sc*i* alias=pci:v00001002d00004E47sv*sd*bc*sc*i* alias=pci:v00001002d00004E46sv*sd*bc*sc*i* alias=pci:v00001002d00004E45sv*sd*bc*sc*i* alias=pci:v00001002d00004E44sv*sd*bc*sc*i* alias=pci:v00001002d00004C67sv*sd*bc*sc*i* alias=pci:v00001002d00004C66sv*sd*bc*sc*i* alias=pci:v00001002d00004C64sv*sd*bc*sc*i* alias=pci:v00001002d00004C5Asv*sd*bc*sc*i* alias=pci:v00001002d00004C59sv*sd*bc*sc*i* alias=pci:v00001002d00004C58sv*sd*bc*sc*i* alias=pci:v00001002d00004C57sv*sd*bc*sc*i* alias=pci:v00001002d00004B4Csv*sd*bc*sc*i* alias=pci:v00001002d00004B4Bsv*sd*bc*sc*i* alias=pci:v00001002d00004B4Asv*sd*bc*sc*i* alias=pci:v00001002d00004B49sv*sd*bc*sc*i* alias=pci:v00001002d00004B48sv*sd*bc*sc*i* alias=pci:v00001002d00004A54sv*sd*bc*sc*i* alias=pci:v00001002d00004A50sv*sd*bc*sc*i* alias=pci:v00001002d00004A4Fsv*sd*bc*sc*i* alias=pci:v00001002d00004A4Esv*sd*bc*sc*i* alias=pci:v00001002d00004A4Dsv*sd*bc*sc*i* alias=pci:v00001002d00004A4Csv*sd*bc*sc*i* alias=pci:v00001002d00004A4Bsv*sd*bc*sc*i* alias=pci:v00001002d00004A4Asv*sd*bc*sc*i* alias=pci:v00001002d00004A49sv*sd*bc*sc*i* alias=pci:v00001002d00004A48sv*sd*bc*sc*i* alias=pci:v00001002d00004967sv*sd*bc*sc*i* alias=pci:v00001002d00004966sv*sd*bc*sc*i* alias=pci:v00001002d00004437sv*sd*bc*sc*i* alias=pci:v00001002d00004337sv*sd*bc*sc*i* alias=pci:v00001002d00004336sv*sd*bc*sc*i* alias=pci:v00001002d00004242sv*sd*bc*sc*i* alias=pci:v00001002d00004237sv*sd*bc*sc*i* alias=pci:v00001002d00004156sv*sd*bc*sc*i* alias=pci:v00001002d00004155sv*sd*bc*sc*i* alias=pci:v00001002d00004154sv*sd*bc*sc*i* alias=pci:v00001002d00004153sv*sd*bc*sc*i* alias=pci:v00001002d00004152sv*sd*bc*sc*i* alias=pci:v00001002d00004151sv*sd*bc*sc*i* alias=pci:v00001002d00004150sv*sd*bc*sc*i* alias=pci:v00001002d0000414Bsv*sd*bc*sc*i* alias=pci:v00001002d0000414Asv*sd*bc*sc*i* alias=pci:v00001002d00004149sv*sd*bc*sc*i* alias=pci:v00001002d00004148sv*sd*bc*sc*i* alias=pci:v00001002d00004147sv*sd*bc*sc*i* alias=pci:v00001002d00004146sv*sd*bc*sc*i* alias=pci:v00001002d00004145sv*sd*bc*sc*i* alias=pci:v00001002d00004144sv*sd*bc*sc*i* alias=pci:v00001002d00004137sv*sd*bc*sc*i* alias=pci:v00001002d00004136sv*sd*bc*sc*i* alias=pci:v00001002d00003E54sv*sd*bc*sc*i* alias=pci:v00001002d00003E50sv*sd*bc*sc*i* alias=pci:v00001002d00003155sv*sd*bc*sc*i* alias=pci:v00001002d00003154sv*sd*bc*sc*i* alias=pci:v00001002d00003152sv*sd*bc*sc*i* alias=pci:v00001002d00003151sv*sd*bc*sc*i* alias=pci:v00001002d00003150sv*sd*bc*sc*i* alias=pci:v00001002d0000131Dsv*sd*bc*sc*i* alias=pci:v00001002d0000131Csv*sd*bc*sc*i* alias=pci:v00001002d0000131Bsv*sd*bc*sc*i* alias=pci:v00001002d00001318sv*sd*bc*sc*i* alias=pci:v00001002d00001317sv*sd*bc*sc*i* alias=pci:v00001002d00001316sv*sd*bc*sc*i* alias=pci:v00001002d00001315sv*sd*bc*sc*i* alias=pci:v00001002d00001313sv*sd*bc*sc*i* alias=pci:v00001002d00001312sv*sd*bc*sc*i* alias=pci:v00001002d00001311sv*sd*bc*sc*i* alias=pci:v00001002d00001310sv*sd*bc*sc*i* alias=pci:v00001002d0000130Fsv*sd*bc*sc*i* alias=pci:v00001002d0000130Esv*sd*bc*sc*i* alias=pci:v00001002d0000130Dsv*sd*bc*sc*i* alias=pci:v00001002d0000130Csv*sd*bc*sc*i* alias=pci:v00001002d0000130Bsv*sd*bc*sc*i* alias=pci:v00001002d0000130Asv*sd*bc*sc*i* alias=pci:v00001002d00001309sv*sd*bc*sc*i* alias=pci:v00001002d00001307sv*sd*bc*sc*i* alias=pci:v00001002d00001306sv*sd*bc*sc*i* alias=pci:v00001002d00001305sv*sd*bc*sc*i* alias=pci:v00001002d00001304sv*sd*bc*sc*i* depends=drm,drm_kms_helper,ttm,i2c-core,i2c-algo-bit vermagic=2.6.32-696.20.1.el6.x86_64 SMP mod_unload modversions $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $
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