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L 1L I HEALJ0 Ht H ALJ0 'A, (# H t6(# O1 A0 HA, IG0! ALJ @ A HUR8 UI( H( HEIW0 L %s: mac tx[%d]/rx[%d] reset failed [%08x]
<4>%s: PCS reset bit would not clear [%08x].
<6>%s: Link up at %d Mbps, %s-duplex.
<6>%s: Pause is enabled (rxfifo: %d off: %d on: %d)
<3>%s: enabling mac failed [tx:%08x:%08x].
<3>%s: enabling mac failed [%s:%08x:%08x].
<3>%s: transmit timed out, resetting
<3>%s: TX_STATE[%08x:%08x:%08x] FIFO[%08x:%08x:%08x] SM1[%08x] SM2[%08x]
<3>%s: RX_STATE[%08x:%08x:%08x]
<3>%s: HP_STATE[%08x:%08x:%08x:%08x]
<6>%s: Got link after fallback, retrying autoneg once...
<6>%s: Autoneg failed again, keeping forced mode
<6>%s: link configuration changed
/builddir/build/BUILD/kernel-2.6.32-754.35.1.el6/linux-2.6.32-754.35.1.el6.x86_64/arch/x86/include/asm/dma-mapping.h Cannot enable PCI device, aborting.
Cannot find proper PCI device base address, aborting.
Etherdev alloc failed, aborting.
Cannot obtain PCI resources, aborting.
<4>cassini: Could not enable MWI for %s
Could not set PCI cache line size
Unable to obtain 64-bit DMA for consistent allocations
No usable DMA configuration, aborting.
Cannot map device registers, aborting.
cassini: MTU limited to %d bytes
cassini: MAC address not found in ROM VPD
<3>cassini: MII phy did not respond [%08x]
<3>cassini: Failed to load firmware "%s"
<3>cassini: bogus length %zu in "%s"
Cannot allocate init block, aborting.
Cannot register net device, aborting.
<6>%s: Sun Cassini%s (%sbit/%sMHz PCI/%s) Ethernet[%d] %pM
<3>cassini: %s: BUG! Tx Ring full when queue awake!
<7>%s: tx[%d] queued, slot %d, skblen %d, avail %d
<3>%s: no spare buffers available.
<7>%s: rxd[%d] interrupt, done: %d
<7>%s: tx err: MAC_STATE[%08x]
<7>%s: tx err: TX_FIFO[%08x:%08x:%08x]
<3>%s: failed to request irq !
<7>%s: tx interrupt, status: 0x%x, %llx
<7>%s: rx[%d] interrupt, done: %d/%d
<6>%s: Memory squeeze, deferring packet.
<7>%s: corrupt rx tag framing
<7>%s: length mismatch for rx frame
<7>%s: txmac interrupt, txmac_stat: 0x%x
<3>%s: TX MAC max packet size error.
<7>%s: rxmac interrupt, stat: 0x%x
<7>%s: mac interrupt, stat: 0x%x
<3>%s: Read PCI cfg space status [%04x]
<3>%s: PCI parity error detected.
<3>%s: PCI master acks target abort.
<3>%s: PCI system error SERR#.
<3>%s:reset called in cas_abnormal_irq [0x%x]
<7>%s: rxc[%d] interrupt, done: %d/%d
full half <6>%s: TX pause enabled
<6>%s: Pause is disabled
rx tx,rx <3>%s: sw reset failed.
%s: hrm.. hw not running!
<3>%s: MIF_STATE[%08x]
<3>%s: MAC_STATE[%08x]
<6>%s: PCS RemoteFault
<6>%s: PCS link down.
<6>%s: Link down
cassini <6>%s &cp->pm_mutex local-mac-address phy-type pcs phy-interface <3>cassini: "%s" Failed %d
Cu Fi 33 66 64 32 + <6>%s: resuming
<7>%s: tx[%d] done, slot %d
<7>%s: rx page overflow: %d
<3>%s: TX MAC xmit underrun.
<3>%s: PCI error [%04x:%04x]
<3>%s: PCI target abort.
<3>%s: PCI master abort.
<3>%s: PCI parity error.
packet arrival? VLAN? CFI? 8023? LLC? LLCc? IPV4? IPV4 cont? IPV4 frag? TCP44? IPV6? IPV6 len IPV6 cont? TCP64? TCP seq TCP control flags TCP length TCP length cont Cleanup Cleanup 2 } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } } S 0 8 H P ` h x , 6 $ :7 * 7 0 7 6 68 < S8 B 8 ( H 8 09 @ N P g9 X T h =: p Z ? ` ? f ? l %? r 4A x C ~ }G ( G 0 @ G H X G ` p CJ x O P P P eQ T T 0 T 8 H )T P ` T h x T fU oU xU U OX kX ` ( 8 g @ P lh X h i p j n & p , n u ' ' ) ( ) 0 ) 8 3 @ 4 H 9 P 9 X D ` D h F p P x P P P P U :k Ck dn mo . . A* *F parm=linkdown_timeout:min reset interval in sec. for PCS linkdown issue; disabled if not positive parmtype=linkdown_timeout:int parm=link_mode:default link mode parmtype=link_mode:int parm=cassini_debug:Cassini bitmapped debugging message enable value parmtype=cassini_debug:int firmware=sun/cassini.bin license=GPL description=Sun Cassini(+) ethernet driver author=Adrian Sun (asun@darksunrising.com) retpoline=Y srcversion=D60435B855E0390AB28DEB4 alias=pci:v0000100Bd00000035sv*sd*bc*sc*i* alias=pci:v0000108Ed0000ABBAsv*sd*bc*sc*i* depends= vermagic=2.6.32-754.35.1.el6.x86_64 SMP mod_unload modversions ( 8 @ H P ` h p u u u u % u E ( u e 0 u 8 u @ u h H u x P u X u ` u h u H p u x u u H
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@#R module_layout ;O alloc_pages_current =" pci_bus_read_config_byte h vmalloc i param_get_int (% strlen M skb_pad y dev_set_drvdata cpu_online_mask y get_random_bytes ˑ malloc_sizes pci_disable_device =^ netif_carrier_on s8 _spin_lock v schedule_work
| netif_carrier_off G6 x86_dma_fallback_dev __const_udelay ù pci_release_regions &j init_timer_key u mutex_unlock vfree _a1 pci_bus_write_config_word %K param_set_int *q _spin_lock_irqsave h} jiffies C __list_add BHu netif_rx B| nr_cpu_ids cU pci_set_master del_timer_sync kR~ __x86_indirect_thunk_r10 memset x>w' alloc_etherdev_mq pci_set_dma_mask + dev_alloc_skb ePb pci_restore_state t pci_iounmap X dev_err 9K __mutex_init cs printk w{ free_netdev ~ strncpy Ֆ; register_netdev 9 mcount R0 warn_slowpath_null ) pci_bus_write_config_dword mutex_lock m per_cpu__kernel_stack J crc32_le [D! list_del yK _spin_unlock_irqrestore c EE mod_timer * netpoll_trap m request_threaded_irq dev_kfree_skb_any %a dev_kfree_skb_irq Hr7 netif_device_attach NOvx pv_irq_ops Z __free_pages \a netif_device_detach S pci_bus_read_config_word fm pci_bus_read_config_dword __stack_chk_fail Q schedule \ɢ. __x86_indirect_thunk_rax W eth_type_trans 5h pci_unregister_driver D kmem_cache_alloc_trace G) __phys_addr T pci_try_set_mwi '}M pci_bus_write_config_byte t eth_validate_addr z kfree dl# memcpy x flush_scheduled_work 0 m pci_request_regions _ __pci_register_driver xe request_firmware qѻL __bitmap_weight as unregister_netdev m get_page x
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